[coreboot-gerrit] Patch set updated for coreboot: ec/google/chromeec: provide common SMI handler helpers

[Aaron Durbin (adurbin@chromium.org)]

Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15685

-gerrit

commit 16629d93bf0021bd85fc3b5c88219b7c39f57e63
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Thu Jul 14 00:29:03 2016 -0500

    ec/google/chromeec: provide common SMI handler helpers
    
    The mainboards which use the Chrome EC duplicate the
    same logic in the mainboard smi handler. Provide common
    helper functions for those boards to utilize.
    
    BUG=chrome-os-partner:54977
    
    Change-Id: I0d3ad617d211ecbea302114b17ad700b935e24d5
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/ec/google/chromeec/Makefile.inc |  2 +-
 src/ec/google/chromeec/smihandler.c | 90 +++++++++++++++++++++++++++++++++++++
 src/ec/google/chromeec/smm.h        | 37 +++++++++++++++
 3 files changed, 128 insertions(+), 1 deletion(-)

diff --git a/src/ec/google/chromeec/Makefile.inc b/src/ec/google/chromeec/Makefile.inc
index 4a03948..58f8b6b 100644
--- a/src/ec/google/chromeec/Makefile.inc
+++ b/src/ec/google/chromeec/Makefile.inc
@@ -6,7 +6,7 @@ ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_I2C) += ec_i2c.c
 ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_LPC) += ec_lpc.c
 ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_MEC) += ec_mec.c
 ramstage-$(CONFIG_EC_GOOGLE_CHROMEEC_SPI) += ec_spi.c
-smm-y += ec.c crosec_proto.c vstore.c
+smm-y += ec.c crosec_proto.c smihandler.c vstore.c
 smm-$(CONFIG_EC_GOOGLE_CHROMEEC_I2C) += ec_i2c.c
 smm-$(CONFIG_EC_GOOGLE_CHROMEEC_LPC) += ec_lpc.c
 smm-$(CONFIG_EC_GOOGLE_CHROMEEC_MEC) += ec_mec.c
diff --git a/src/ec/google/chromeec/smihandler.c b/src/ec/google/chromeec/smihandler.c
new file mode 100644
index 0000000..75636ea
--- /dev/null
+++ b/src/ec/google/chromeec/smihandler.c
@@ -0,0 +1,90 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/acpi.h>
+#include <console/console.h>
+#include <cpu/x86/smm.h>
+#include <ec/google/chromeec/ec.h>
+#include <elog.h>
+#include <halt.h>
+#include "smm.h"
+
+static int chromeec_process_one_event(void)
+{
+	uint8_t event = google_chromeec_get_event();
+
+	/* Log this event */
+	if (IS_ENABLED(CONFIG_ELOG_GSMI) && event)
+		elog_add_event_byte(ELOG_TYPE_EC_EVENT, event);
+
+	switch (event) {
+	case EC_HOST_EVENT_LID_CLOSED:
+		printk(BIOS_DEBUG, "LID CLOSED, SHUTDOWN\n");
+
+		poweroff();
+		break;
+	}
+	return !!event;
+}
+
+void chromeec_smi_process_events(void)
+{
+	/* Process all pending events */
+	while (chromeec_process_one_event())
+		;
+}
+
+static void clear_pending_events(void)
+{
+	while (google_chromeec_get_event() != 0)
+		;
+}
+
+void chromeec_smi_sleep(int slp_type, uint32_t s3_mask, uint32_t s5_mask)
+{
+	switch (slp_type) {
+	case ACPI_S3:
+		/* Enable wake events */
+		google_chromeec_set_wake_mask(s3_mask);
+		break;
+	case ACPI_S5:
+		/* Enable wake events */
+		google_chromeec_set_wake_mask(s5_mask);
+		break;
+	}
+
+	/* Disable SCI and SMI events */
+	google_chromeec_set_smi_mask(0);
+	google_chromeec_set_sci_mask(0);
+
+	/* Clear pending events that may trigger immediate wake */
+	clear_pending_events();
+}
+
+void chromeec_smi_apmc(int apmc, uint32_t sci_mask, uint32_t smi_mask)
+{
+	switch (apmc) {
+	case APM_CNT_ACPI_ENABLE:
+		google_chromeec_set_smi_mask(0);
+		clear_pending_events();
+		google_chromeec_set_sci_mask(sci_mask);
+		break;
+	case APM_CNT_ACPI_DISABLE:
+		google_chromeec_set_sci_mask(0);
+		clear_pending_events();
+		google_chromeec_set_smi_mask(smi_mask);
+		break;
+	}
+}
diff --git a/src/ec/google/chromeec/smm.h b/src/ec/google/chromeec/smm.h
new file mode 100644
index 0000000..03d6e00
--- /dev/null
+++ b/src/ec/google/chromeec/smm.h
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _EC_GOOGLE_CHROMEEC_SMM_H
+#define _EC_GOOGLE_CHROMEEC_SMM_H
+
+#include <stdint.h>
+
+/* Process all events from the EC when EC triggered an SMI#. */
+void chromeec_smi_process_events(void);
+
+/*
+ * Set wake masks according to sleep type, clear SCI and SMI masks,
+ * and clear any pending events.
+ */
+void chromeec_smi_sleep(int slp_type, uint32_t s3_mask, uint32_t s5_mask);
+
+/*
+ * Provided the APMC command do the following while clearing pending events.
+ * APM_CNT_ACPI_ENABLE: clear SMI mask. set SCI mask.
+ * APM_CNT_ACPI_DISABLE: clear SCI mask. set SMI mask.
+ */
+void chromeec_smi_apmc(int apmc, uint32_t sci_mask, uint32_t smi_mask);
+
+#endif /* _EC_GOOGLE_CHROMEEC_SMM_H */