[coreboot-gerrit] Patch set updated for coreboot: soc/intel/common: use common Intel ACPI hardware definitions

[Aaron Durbin (adurbin@chromium.org)]

Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15668

-gerrit

commit 71396d85511b93b1ea28b6a078719a95688f330d
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed Jul 13 23:19:46 2016 -0500

    soc/intel/common: use common Intel ACPI hardware definitions
    
    Transition to using the common Intel ACPI hardware definitions
    generic ACPI definitions.
    
    BUG=chrome-os-partner:54977
    
    Change-Id: I40560b2a65a0cff6808ccdec80e0339786bf8908
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/intel/common/smihandler.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/src/soc/intel/common/smihandler.c b/src/soc/intel/common/smihandler.c
index 5915587..f0c913f 100644
--- a/src/soc/intel/common/smihandler.c
+++ b/src/soc/intel/common/smihandler.c
@@ -137,14 +137,14 @@ void southbridge_smi_sleep(const struct smm_save_state_ops *save_state_ops)
 	/* Figure out SLP_TYP */
 	reg32 = inl(ACPI_PMIO_BASE + PM1_CNT);
 	printk(BIOS_SPEW, "SMI#: SLP = 0x%08x\n", reg32);
-	slp_typ = (reg32 >> 10) & 7;
+	slp_typ = acpi_sleep_from_pm1(reg32);
 
 	/* Do any mainboard sleep handling */
-	mainboard_smi_sleep(slp_typ-2);
+	mainboard_smi_sleep(slp_typ);
 
 	/* Log S3, S4, and S5 entry */
-	if (slp_typ >= 5 && IS_ENABLED(CONFIG_ELOG_GSMI))
-		elog_add_event_byte(ELOG_TYPE_ACPI_ENTER, slp_typ-2);
+	if (slp_typ >= ACPI_S3 && IS_ENABLED(CONFIG_ELOG_GSMI))
+		elog_add_event_byte(ELOG_TYPE_ACPI_ENTER, slp_typ);
 
 	/* Clear pending GPE events */
 	clear_gpe_status();
@@ -152,19 +152,19 @@ void southbridge_smi_sleep(const struct smm_save_state_ops *save_state_ops)
 	/* Next, do the deed. */
 
 	switch (slp_typ) {
-	case SLP_TYP_S0:
+	case ACPI_S0:
 		printk(BIOS_DEBUG, "SMI#: Entering S0 (On)\n");
 		break;
-	case SLP_TYP_S3:
+	case ACPI_S3:
 		printk(BIOS_DEBUG, "SMI#: Entering S3 (Suspend-To-RAM)\n");
 
 		/* Invalidate the cache before going to S3 */
 		wbinvd();
 		break;
-	case SLP_TYP_S4:
+	case ACPI_S4:
 		printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n");
 		break;
-	case SLP_TYP_S5:
+	case ACPI_S5:
 		printk(BIOS_DEBUG, "SMI#: Entering S5 (Soft Power off)\n");
 
 		/* Disable all GPE */
@@ -188,7 +188,7 @@ void southbridge_smi_sleep(const struct smm_save_state_ops *save_state_ops)
 	enable_pm1_control(SLP_EN);
 
 	/* Make sure to stop executing code here for S3/S4/S5 */
-	if (slp_typ > 1)
+	if (slp_typ >= ACPI_S3)
 		hlt();
 
 	/*