[coreboot-gerrit] New patch to review for coreboot: google/reef: Write protect GPIO relative to bank offset

[Susendra Selvaraj (susendra.selvaraj@intel.com)]

Susendra Selvaraj (susendra.selvaraj at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15691

-gerrit

commit 4326cce27045016f06649242f379b003a415b523
Author: sselvar2 <susendra.selvaraj at intel.com>
Date:   Wed Jun 22 03:52:03 2016 +0530

    google/reef: Write protect GPIO relative to bank offset
    
    Update the write protect GPIO reported in ACPI to 0x8023 w.r.t
    bank offset. Also update the controller ID to Broxton which
    will point at the goldmont device and includes write protect GPIO.
    
    BUG=SYSCROS-14265
    BRANCH=none
    TEST=verify crossystem output for wpsw_cur.
    
    Change-Id: Ibe6a013aaab18bfa2436698298177218ca934fab
    Signed-off-by: sselvar2 <susendra.selvaraj at intel.com>
    Reviewed-on: https://coreboot.intel.com/7929
    Reviewed-by: Petrov, Andrey <andrey.petrov at intel.com>
    Tested-by: Petrov, Andrey <andrey.petrov at intel.com>
---
 src/mainboard/google/reef/acpi/chromeos.asl      | 23 -----------------------
 src/mainboard/google/reef/acpi/chromeos_reef.asl | 23 +++++++++++++++++++++++
 src/mainboard/google/reef/dsdt.asl               |  2 +-
 3 files changed, 24 insertions(+), 24 deletions(-)

diff --git a/src/mainboard/google/reef/acpi/chromeos.asl b/src/mainboard/google/reef/acpi/chromeos.asl
deleted file mode 100644
index d6a0080..0000000
--- a/src/mainboard/google/reef/acpi/chromeos.asl
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2016 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <soc/gpio_defs.h>
-
-Name (OIPG, Package () {
-	/* No physical recovery GPIO. */
-	Package () { 0x0001, 0, 0xFFFFFFFF, "INT3452:00" },
-	/* Firmware write protect GPIO. */
-	Package () { 0x0003, 1, GPIO_75, "INT3452:00" },
-})
diff --git a/src/mainboard/google/reef/acpi/chromeos_reef.asl b/src/mainboard/google/reef/acpi/chromeos_reef.asl
new file mode 100644
index 0000000..aa2c722
--- /dev/null
+++ b/src/mainboard/google/reef/acpi/chromeos_reef.asl
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <soc/gpio_defs.h>
+
+Name (OIPG, Package () {
+	/* No physical recovery GPIO. */
+	Package () { 0x0001, 0, 0xFFFFFFFF, "Broxton" },
+	/* Firmware write protect GPIO. */
+	Package () { 0x0003, 1, 0x8023, "Broxton" },
+})
diff --git a/src/mainboard/google/reef/dsdt.asl b/src/mainboard/google/reef/dsdt.asl
index e48db4b..6e802af 100644
--- a/src/mainboard/google/reef/dsdt.asl
+++ b/src/mainboard/google/reef/dsdt.asl
@@ -37,7 +37,7 @@ DefinitionBlock(
 	}
 
 	/* Chrome OS specific */
-	#include "acpi/chromeos.asl"
+	#include "acpi/chromeos_reef.asl"
 	#include <vendorcode/google/chromeos/acpi/chromeos.asl>
 
 	/* Chipset specific sleep states */