[coreboot-gerrit] Patch set updated for coreboot: southbridge/intel/i82801gx: use common Intel ACPI hardware definitions

[Aaron Durbin (adurbin@chromium.org)]

Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15679

-gerrit

commit e4db663e0361f22fd1d0f5b4d0fb1267bc64ceb2
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed Jul 13 23:24:55 2016 -0500

    southbridge/intel/i82801gx: use common Intel ACPI hardware definitions
    
    Transition to using the common Intel ACPI hardware definitions
    generic ACPI definitions.
    
    BUG=chrome-os-partner:54977
    
    Change-Id: I08fb52ca13a4355d95fe31516c43de18d40de140
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/southbridge/intel/i82801gx/Kconfig      |  1 +
 src/southbridge/intel/i82801gx/i82801gx.h   |  5 +++--
 src/southbridge/intel/i82801gx/smihandler.c | 16 ++++++++--------
 3 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig
index c435b99..1f22d05 100644
--- a/src/southbridge/intel/i82801gx/Kconfig
+++ b/src/southbridge/intel/i82801gx/Kconfig
@@ -15,6 +15,7 @@
 
 config SOUTHBRIDGE_INTEL_I82801GX
 	bool
+	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select SOUTHBRIDGE_INTEL_COMMON
 	select IOAPIC
 	select HAVE_HARD_RESET
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 17b7026..d4adc18 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -15,6 +15,9 @@
 
 #ifndef SOUTHBRIDGE_INTEL_I82801GX_I82801GX_H
 #define SOUTHBRIDGE_INTEL_I82801GX_I82801GX_H
+
+#include <arch/acpi.h>
+
 /*
  * It does not matter where we put the SMBus I/O base, as long as we
  * keep it consistent and don't interfere with other devices.  Stage2
@@ -319,8 +322,6 @@ int southbridge_detect_s3_resume(void);
 #define   GBL_EN	(1 << 5)
 #define   TMROF_EN	(1 << 0)
 #define PM1_CNT		0x04
-#define   SLP_EN	(1 << 13)
-#define   SLP_TYP	(7 << 10)
 #define   GBL_RLS	(1 << 2)
 #define   BM_RLD	(1 << 1)
 #define   SCI_EN	(1 << 0)
diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c
index 3afaaa1..bcc7641 100644
--- a/src/southbridge/intel/i82801gx/smihandler.c
+++ b/src/southbridge/intel/i82801gx/smihandler.c
@@ -326,21 +326,21 @@ static void southbridge_smi_sleep(unsigned int node, smm_state_save_area_t *stat
 	/* Figure out SLP_TYP */
 	reg32 = inl(pmbase + PM1_CNT);
 	printk(BIOS_SPEW, "SMI#: SLP = 0x%08x\n", reg32);
-	slp_typ = (reg32 >> 10) & 7;
+	slp_typ = acpi_sleep_from_pm1(reg32);
 
 	/* Next, do the deed.
 	 */
 
 	switch (slp_typ) {
-	case 0: printk(BIOS_DEBUG, "SMI#: Entering S0 (On)\n"); break;
-	case 1: printk(BIOS_DEBUG, "SMI#: Entering S1 (Assert STPCLK#)\n"); break;
-	case 5:
+	case ACPI_S0: printk(BIOS_DEBUG, "SMI#: Entering S0 (On)\n"); break;
+	case ACPI_S1: printk(BIOS_DEBUG, "SMI#: Entering S1 (Assert STPCLK#)\n"); break;
+	case ACPI_S3:
 		printk(BIOS_DEBUG, "SMI#: Entering S3 (Suspend-To-RAM)\n");
 		/* Invalidate the cache before going to S3 */
 		wbinvd();
 		break;
-	case 6: printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n"); break;
-	case 7:
+	case ACPI_S4: printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n"); break;
+	case ACPI_S5:
 		printk(BIOS_DEBUG, "SMI#: Entering S5 (Soft Power off)\n");
 
 		outl(0, pmbase + GPE0_EN);
@@ -367,7 +367,7 @@ static void southbridge_smi_sleep(unsigned int node, smm_state_save_area_t *stat
 	 * will never be unlocked because the next outl will switch off the CPU.
 	 * This might open a small race between the smi_release_lock() and the outl()
 	 * for other SMI handlers. Not sure if this could cause trouble. */
-	 if (slp_typ == 5)
+	 if (slp_typ == ACPI_S3)
 		smi_release_lock();
 #endif
 
@@ -378,7 +378,7 @@ static void southbridge_smi_sleep(unsigned int node, smm_state_save_area_t *stat
 	outl(reg32 | SLP_EN, pmbase + PM1_CNT);
 
 	/* Make sure to stop executing code here for S3/S4/S5 */
-	if (slp_typ > 1)
+	if (slp_typ >= ACPI_S3)
 		halt();
 	/* In most sleep states, the code flow of this function ends at
 	 * the line above. However, if we entered sleep state S1 and wake