[coreboot-gerrit] Patch set updated for coreboot: mainboard/intel/amenia: use new gpio interrupt macros

[Aaron Durbin (adurbin@chromium.org)]

Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15646

-gerrit

commit cfcae559b7097e14946bfae511c2e97c4505d0dc
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Tue Jul 12 17:31:22 2016 -0500

    mainboard/intel/amenia: use new gpio interrupt macros
    
    Utilize the new interrupt macros in order to specify correct
    polarity of the gpio interupts. Some of the interrupts were
    working by catching the opposite edge of the asserted interrupt.
    
    BUG=chrome-os-partner:54977
    
    Change-Id: I55bee2c4363cfdbf340a4d5b3574b34152e0069c
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/mainboard/intel/amenia/gpio.h | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/src/mainboard/intel/amenia/gpio.h b/src/mainboard/intel/amenia/gpio.h
index a39cca3..d07960a 100644
--- a/src/mainboard/intel/amenia/gpio.h
+++ b/src/mainboard/intel/amenia/gpio.h
@@ -215,7 +215,7 @@ static const struct pad_config gpio_table[] = {
 	PAD_NC(GPIO_111, DN_20K), /* GP_SSP_1_CLK */
 	PAD_CFG_GPO(GPIO_112, 1, DEEP), /* FP Reset */
 	PAD_NC(GPIO_113, DN_20K), /* GP_SSP_1_FS1 */
-	PAD_CFG_GPI_APIC(GPIO_116, UP_20K, DEEP, LEVEL, INVERT),
+	PAD_CFG_GPI_APIC_LOW(GPIO_116, UP_20K, DEEP),
 	/* AUDIO_CODEC_IRQ_N */
 	PAD_NC(GPIO_117, DN_20K), /* GP_SSP_1_TXD */
 	/* GP_SSP_2 */
@@ -239,23 +239,23 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF(GPIO_8, NATIVE, DEEP, NF1),
 	PAD_CFG_GPI(GPIO_9, UP_20K, DEEP), /* SPI_TPM_IRQ_N  */
 	PAD_NC(GPIO_10, DN_20K), /* RSVD for MIPI (unused) */
-	PAD_CFG_GPI_SCI(GPIO_11, UP_20K, DEEP, EDGE_SINGLE, INVERT),
+	PAD_CFG_GPI_SCI_LOW(GPIO_11, UP_20K, DEEP, EDGE_SINGLE),
 	/* SOC_WAKE_SCI_N */
 	PAD_NC(GPIO_12, DN_20K),
 	PAD_NC(GPIO_13, DN_20K),
-	PAD_CFG_GPI_APIC(GPIO_14, UP_20K, DEEP, LEVEL, NONE), /* FP INT */
+	PAD_CFG_GPI_APIC_LOW(GPIO_14, UP_20K, DEEP), /* FP INT */
 	PAD_NC(GPIO_15, DN_20K),
 	PAD_NC(GPIO_16, UP_20K),
 	PAD_NC(GPIO_17, UP_20K),
-	PAD_CFG_GPI_APIC(GPIO_18, UP_20K, DEEP, LEVEL, NONE),
+	PAD_CFG_GPI_APIC_LOW(GPIO_18, UP_20K, DEEP),
 	/* Trackpad_INT_N */
-	PAD_CFG_GPI_APIC(GPIO_19, UP_20K, DEEP, LEVEL, NONE),
+	PAD_CFG_GPI_APIC_LOW(GPIO_19, UP_20K, DEEP),
 	/* Audio_Jack_Present_N */
-	PAD_CFG_GPI_APIC(GPIO_20, UP_20K, DEEP, LEVEL, NONE),
+	PAD_CFG_GPI_APIC_LOW(GPIO_20, UP_20K, DEEP),
 	/* NFC INT */
-	PAD_CFG_GPI_APIC(GPIO_21, UP_20K, DEEP, LEVEL, NONE),
+	PAD_CFG_GPI_APIC_LOW(GPIO_21, UP_20K, DEEP),
 	/* TCH_INT_N */
-	PAD_CFG_GPI_APIC(GPIO_22, UP_20K, DEEP, LEVEL, NONE),
+	PAD_CFG_GPI_SCI_LOW(GPIO_22, UP_20K, DEEP, EDGE_SINGLE),
 	/* EC_SOC_WAKE_1P8_N */
 	PAD_CFG_GPO(GPIO_23, 1, DEEP), /* GPS_NSTANDBY */
 	PAD_CFG_GPO(GPIO_24, 1, DEEP), /* SSD_SATA_DEVSLP */
@@ -264,7 +264,7 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_GPO(GPIO_27, 0, DEEP), /* NFC DL REQ */
 	PAD_NC(GPIO_28, DN_20K),
 	PAD_NC(GPIO_29, DN_20K),
-	PAD_CFG_GPI_APIC(GPIO_30, UP_20K, DEEP, LEVEL, NONE),
+	PAD_CFG_GPI_APIC_LOW(GPIO_30, UP_20K, DEEP),
 	/* EC_KBD_IRQ_SOC_N */
 	PAD_NC(GPIO_31, DN_20K),
 	PAD_CFG_NF(GPIO_32, NATIVE, DEEP, NF5), /* GPS_SUSCLK_32K */
@@ -284,7 +284,7 @@ static const struct pad_config gpio_table[] = {
 	PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* UART2 RX*/
 	PAD_CFG_NF(GPIO_47, NATIVE, DEEP, NF1), /* UART2 TX*/
 	PAD_NC(GPIO_48, UP_20K),
-	PAD_CFG_GPI_SMI(GPIO_49, UP_20K, DEEP, LEVEL, NONE), /* EC_SMI_N */
+	PAD_CFG_GPI_SMI_LOW(GPIO_49, UP_20K, DEEP, EDGE_SINGLE), /* EC_SMI_N */
 	/* Camera interface*/
 	PAD_NC(GPIO_62, DN_20K), /* GP_CAMERASB00 */
 	PAD_NC(GPIO_63, DN_20K), /* GP_CAMERASB01 */