[coreboot-gerrit] Patch merged into coreboot/master: SPD: Add CAS latency 2

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 89186b2eb8167b56bf76d9cc03587d678b9bc661
Author: Elyes HAOUAS <ehaouas at noos.fr>
Date:   Sun Jun 26 17:46:21 2016 +0200

    SPD: Add CAS latency 2
    
    CAS latency = 2 support added for DDR2.
    
    Change-Id: I08d72a61c27ff0eab19e500a2f547a5e946de2f0
    Signed-off-by: Elyes HAOUAS <ehaouas at noos.fr>
    Reviewed-on: https://review.coreboot.org/15439
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Patrick Georgi <pgeorgi at google.com>


See https://review.coreboot.org/15439 for details.

-gerrit