[coreboot-gerrit] Patch set updated for coreboot: google/rotor: Add support for the Rotor mainboard

hakim giydan (hgiydan@marvell.com) gerrit at coreboot.org
Wed Jul 6 20:48:04 CEST 2016


hakim giydan (hgiydan at marvell.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15507

-gerrit

commit 9e21f6fef8f9406f879a24549725ce6e3f92b779
Author: Hakim Giydan <hgiydan at marvell.com>
Date:   Wed Jul 6 11:45:41 2016 -0700

    google/rotor: Add support for the Rotor mainboard
    
    Change-Id: I1f97b6f159a0ac36c96636066332ba355c056186
    Signed-off-by: Hakim Giydan <hgiydan at marvell.com>
---
 src/mainboard/google/rotor/Kconfig        | 46 +++++++++++++++++++++++++++++
 src/mainboard/google/rotor/Kconfig.name   |  2 ++
 src/mainboard/google/rotor/Makefile.inc   | 23 +++++++++++++++
 src/mainboard/google/rotor/board_info.txt |  3 ++
 src/mainboard/google/rotor/chromeos.c     | 45 +++++++++++++++++++++++++++++
 src/mainboard/google/rotor/chromeos.fmd   | 27 +++++++++++++++++
 src/mainboard/google/rotor/devicetree.cb  | 18 ++++++++++++
 src/mainboard/google/rotor/mainboard.c    | 48 +++++++++++++++++++++++++++++++
 src/mainboard/google/rotor/memlayout.ld   | 16 +++++++++++
 src/mainboard/google/rotor/reset.c        | 22 ++++++++++++++
 10 files changed, 250 insertions(+)

diff --git a/src/mainboard/google/rotor/Kconfig b/src/mainboard/google/rotor/Kconfig
new file mode 100644
index 0000000..22259f2
--- /dev/null
+++ b/src/mainboard/google/rotor/Kconfig
@@ -0,0 +1,46 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Google, Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+
+if BOARD_GOOGLE_ROTOR
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select SOC_MARVELL_MVMAP2315
+	select MAINBOARD_HAS_CHROMEOS
+	select BOARD_ROMSIZE_KB_4096
+	select VBOOT2_MOCK_SECDATA
+
+config MAINBOARD_DIR
+	string
+	default google/rotor
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "rotor"
+
+config GBB_HWID
+	string
+	depends on CHROMEOS
+	default "ROTOR TEST 1234"
+
+config RAMTOP
+	hex
+	default 0x73000000
+
+config RAMBASE
+	hex
+	default 0x400000
+
+endif # BOARD_GOOGLE_ROTOR
diff --git a/src/mainboard/google/rotor/Kconfig.name b/src/mainboard/google/rotor/Kconfig.name
new file mode 100644
index 0000000..710c2dd
--- /dev/null
+++ b/src/mainboard/google/rotor/Kconfig.name
@@ -0,0 +1,2 @@
+config BOARD_GOOGLE_ROTOR
+	bool "Rotor"
diff --git a/src/mainboard/google/rotor/Makefile.inc b/src/mainboard/google/rotor/Makefile.inc
new file mode 100644
index 0000000..9f485a7
--- /dev/null
+++ b/src/mainboard/google/rotor/Makefile.inc
@@ -0,0 +1,23 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Google, Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+
+ramstage-y += mainboard.c
+ramstage-y += memlayout.ld
+ramstage-y += reset.c
+ramstage-$(CONFIG_CHROMEOS) += chromeos.c
+
+romstage-y += memlayout.ld
+romstage-y += reset.c
+romstage-$(CONFIG_CHROMEOS) += chromeos.c
diff --git a/src/mainboard/google/rotor/board_info.txt b/src/mainboard/google/rotor/board_info.txt
new file mode 100644
index 0000000..27011b2
--- /dev/null
+++ b/src/mainboard/google/rotor/board_info.txt
@@ -0,0 +1,3 @@
+Category: laptop
+ROM protocol: parallel flash
+Flashrom support: y
diff --git a/src/mainboard/google/rotor/chromeos.c b/src/mainboard/google/rotor/chromeos.c
new file mode 100644
index 0000000..d3db439
--- /dev/null
+++ b/src/mainboard/google/rotor/chromeos.c
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <boot/coreboot_tables.h>
+#include <bootmode.h>
+#include <console/console.h>
+
+	/* TODO: impelemnt the following functions if needed */
+
+void fill_lb_gpios(struct lb_gpios *gpios)
+{
+	int count = 0;
+
+	gpios->size = sizeof(*gpios) + (count * sizeof(struct lb_gpio));
+	gpios->count = count;
+
+	printk(BIOS_ERR, "Added %d GPIOS size %d\n", count, gpios->size);
+}
+
+int get_developer_mode_switch(void)
+{
+	return 1;
+}
+
+int get_recovery_mode_switch(void)
+{
+	return 0;
+}
+
+int get_write_protect_state(void)
+{
+	return 0;
+}
diff --git a/src/mainboard/google/rotor/chromeos.fmd b/src/mainboard/google/rotor/chromeos.fmd
new file mode 100644
index 0000000..f4a2819
--- /dev/null
+++ b/src/mainboard/google/rotor/chromeos.fmd
@@ -0,0 +1,27 @@
+FLASH at 0x0 0x400000 {
+	WP_RO at 0x0 0x200000 {
+		RO_SECTION at 0x0 0x1f0000 {
+			BOOTBLOCK at 0 128K
+			COREBOOT(CBFS)@0x20000 0xe0000
+			FMAP at 0x100000 0x1000
+			GBB at 0x101000 0xeef00
+			RO_FRID at 0x1eff00 0x100
+		}
+		RO_VPD at 0x1f0000 0x10000
+	}
+	RW_SECTION_A at 0x200000 0x78000 {
+		VBLOCK_A at 0x0 0x2000
+		FW_MAIN_A(CBFS)@0x2000 0x75f00
+		RW_FWID_A at 0x77f00 0x100
+	}
+	RW_SHARED at 0x278000 0x4000 {
+		SHARED_DATA at 0x0 0x4000
+	}
+	RW_ELOG at 0x27c000 0x4000
+	RW_SECTION_B at 0x280000 0x78000 {
+		VBLOCK_B at 0x0 0x2000
+		FW_MAIN_B(CBFS)@0x2000 0x75f00
+		RW_FWID_B at 0x77f00 0x100
+	}
+	RW_VPD at 0x2f8000 0x8000
+}
diff --git a/src/mainboard/google/rotor/devicetree.cb b/src/mainboard/google/rotor/devicetree.cb
new file mode 100644
index 0000000..4fbd09a
--- /dev/null
+++ b/src/mainboard/google/rotor/devicetree.cb
@@ -0,0 +1,18 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Google, Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+
+chip soc/marvell/mvmap2315
+	device cpu_cluster 0 on end
+end
diff --git a/src/mainboard/google/rotor/mainboard.c b/src/mainboard/google/rotor/mainboard.c
new file mode 100644
index 0000000..44c3978
--- /dev/null
+++ b/src/mainboard/google/rotor/mainboard.c
@@ -0,0 +1,48 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/device.h>
+
+static void setup_pinmux(void)
+{
+	/* TODO: setup pins as per miniloader configuration
+	 * Possibly move this function to romstage.c if pinmuxing is handled
+	 * during romstage rather than ramstage.
+	 */
+}
+
+static void setup_kernel_info(void)
+{
+	/* TODO: Setup required information for Linux kernel, if anything */
+}
+
+static void mainboard_init(device_t dev)
+{
+	/*TODO: add ramstage initialization code here */
+
+	setup_pinmux();
+
+	setup_kernel_info();
+}
+
+static void mainboard_enable(device_t dev)
+{
+	dev->ops->init = &mainboard_init;
+}
+
+struct chip_operations mainboard_ops = {
+	.name	= "rotor",
+	.enable_dev = mainboard_enable,
+};
diff --git a/src/mainboard/google/rotor/memlayout.ld b/src/mainboard/google/rotor/memlayout.ld
new file mode 100644
index 0000000..1aa0fe3
--- /dev/null
+++ b/src/mainboard/google/rotor/memlayout.ld
@@ -0,0 +1,16 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <soc/memlayout.ld>
diff --git a/src/mainboard/google/rotor/reset.c b/src/mainboard/google/rotor/reset.c
new file mode 100644
index 0000000..087fec4
--- /dev/null
+++ b/src/mainboard/google/rotor/reset.c
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Google, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <soc/reset.h>
+#include <reset.h>
+
+void hard_reset(void)
+{
+	main_reset();
+}



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