[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/apollolake: handle p2sb quirks

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit fadfc2e2f6abbcaea7bbc92c13716c5382443993
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Fri Jul 1 16:36:03 2016 -0500

    soc/intel/apollolake: handle p2sb quirks
    
    The P2SB device is device 0xd and function 0. If hidden that
    causes the latter pci devices on function >= 1 to not be probed
    in the kernel.  This is also a problem for coreboot if the P2SB
    device is hidden by FSP. That means the coreboot driver won't
    be ran. Therefore, provide hide and unhide functions for the
    P2SB device.
    
    The other quirk is to allow the GPIO devices to work correctly.
    Those devices are ACPI devices. However, their resources are
    sub-regions within the P2SB BAR. Sadly, linux doesn't handle
    ACPI devices being children of PCI devices. This leads to resource
    conflict errors when the P2SB device is visible. For the
    time being keep the P2SB device hidden, but also ensure the
    resources it is using are accounted for and reserved. The fallout
    of that is the PMC and SPI device are no longer probed by the
    kernel.
    
    BUG=chrome-os-partner:53017
    TEST=Ensured P2SB device is visible and pci resources are allocated
         correctly for the devices.
    
    Change-Id: I24e59bbde74310e1ce8425b344a3ad0b88702153
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://review.coreboot.org/15530
    Tested-by: build bot (Jenkins)
    Reviewed-by: Andrey Petrov <andrey.petrov at intel.com>
    Reviewed-by: Furquan Shaikh <furquan at google.com>


See https://review.coreboot.org/15530 for details.

-gerrit