[coreboot-gerrit] Patch merged into coreboot/master: AGESA boards: Fix split to romstage and ramstage

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 6aa45c090bf8f52fd531f24d3347fdbf70f3b7a8
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Fri Jun 24 16:37:05 2016 +0300

    AGESA boards: Fix split to romstage and ramstage
    
    Boards broken with commit:
      062ef1c AGESA boards: Split dispatcher to romstage and ramstage
    
    Boot failure with asus/f2a85-m witnessed around MemMS3Save() call,
    message "Save memory S3 data in heap" in verbose agesa logs was
    replaced by a system reset.
    
    Default stubs for MemS3ResumeConstructNBBlock() returned TRUE
    without initializing the block contents. This would not work for case
    with multiple NB support built into same firmware.
    
    MemMCreateS3NbBlock() then returned with S3NBPtr!=NULL with uninitialized
    data and MemMContextSave() referenced those as invalid pointers.
    
    There is no reason to prevent booting in the case S3 resume data is not
    passed to ramstage, so remove the ASSERT(). It only affects builds with
    IDSOPT_IDS_ENABLED=TRUE anyways.
    
    Change-Id: I8fd1e308ceab2b6f4b4c90f0f712934c2918d92d
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
    Reviewed-on: https://review.coreboot.org/15344
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Idwer Vollering <vidwer at gmail.com>


See https://review.coreboot.org/15344 for details.

-gerrit