[coreboot-gerrit] Patch set updated for coreboot: soc/braswell: Configure Boot Flash Write Protect status GPIO

Hannah Williams (hannah.williams@intel.com) gerrit at coreboot.org
Thu Jan 28 03:06:58 CET 2016


Hannah Williams (hannah.williams at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13185

-gerrit

commit e0639bb8a76d2ef6aee41214e6bde8579799a3c4
Author: Hannah Williams <hannah.williams at intel.com>
Date:   Wed May 13 21:48:52 2015 -0700

    soc/braswell: Configure Boot Flash Write Protect status GPIO
    
    Set up the GPIO(MF_ISH_GPIO_4) to read WP status.
    
    TEST=Use crossystem to read the WP status
    Signed-off-by: Hannah Williams <hannah.williams at intel.com>
    Change-Id: I17cbcba013e2a11c2527731df985aa1243065eff
    Original-Reviewed-on: https://chromium-review.googlesource.com/302424
    Original-Tested-by: John Zhao <john.zhao at intel.com>
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Commit-Queue: Hannah Williams <hannah.williams at intel.com>
    Signed-off-by: Hannah Williams <hannah.williams at intel.com>
---
 src/mainboard/intel/strago/gpio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mainboard/intel/strago/gpio.c b/src/mainboard/intel/strago/gpio.c
index 47588fc..2157c8d 100755
--- a/src/mainboard/intel/strago/gpio.c
+++ b/src/mainboard/intel/strago/gpio.c
@@ -242,7 +242,7 @@ static const struct soc_gpio_map  gpe_gpio_map[] = {
 	GPIO_NC, /* 19 MF_GPIO_5 */
 	GPIO_NC, /* 20 MF_GPIO_9 */
 	GPIO_NC, /* 21 MF_GPIO_0 */
-	GPIO_NC, /* 22 MF_GPIO_4 */
+	GPIO_INPUT_PU_20K, /* 22 MF_GPIO_4 */
 	GPIO_NC, /* 23 MF_GPIO_8 */
 	GPIO_NC, /* 24 MF_GPIO_2 */
 	GPIO_NC, /* 25 MF_GPIO_6 */



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