[coreboot-gerrit] Patch set updated for coreboot: soc/intel/apollolake: Fill _PRT entry in DSDT

[Alexandru Gagniuc (mr.nuke.me@gmail.com)]

Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13371

-gerrit

commit 879e02438083a3107b00f8c2a0e6bef82bc93a60
Author: Zhao, Lijian <lijian.zhao at intel.com>
Date:   Wed Dec 2 15:34:45 2015 -0800

    soc/intel/apollolake: Fill _PRT entry in DSDT
    
    ACPI aware OF will need _PRT table to get desired interrupt
    resource assigned and make device driver working. The logical
    device within SOC got fixed interrupt line.
    
    Change-Id: I9595f9a12434fa423862836d19f7266d6023fc5a
    Signed-off-by: Zhao, Lijian <lijian.zhao at intel.com>
---
 src/soc/intel/apollolake/acpi/northbridge.asl | 19 ++++++++++
 src/soc/intel/apollolake/acpi/pci_irqs.asl    | 51 +++++++++++++++++++++++++++
 2 files changed, 70 insertions(+)

diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl
new file mode 100644
index 0000000..ca6b143
--- /dev/null
+++ b/src/soc/intel/apollolake/acpi/northbridge.asl
@@ -0,0 +1,19 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Lance Zhao <lijian.zhao at intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+        Name(_HID, EISAID("PNP0A08"))	/* PCIe */
+        Name(_CID, EISAID("PNP0A03"))	/* PCI */
+        Name(_ADR, 0)
+        Name(_BBN, 0)
+
+/* PCI IRQ assignment */
+#include "pci_irqs.asl"
diff --git a/src/soc/intel/apollolake/acpi/pci_irqs.asl b/src/soc/intel/apollolake/acpi/pci_irqs.asl
new file mode 100644
index 0000000..9a737e2
--- /dev/null
+++ b/src/soc/intel/apollolake/acpi/pci_irqs.asl
@@ -0,0 +1,51 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Lance Zhao <lijian.zhao at intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+Method(_PRT)
+{
+	Return(Package() {
+
+	       Package(){0x0000FFFF, 0, 0, 16},		/* NPK */
+	       Package(){0x0000FFFF, 1, 0, 24},		/* DPTF */
+	       Package(){0x0002FFFF, 0, 0, 19},		/* GEN */
+	       Package(){0x0003FFFF, 0, 0, 21},		/* IUNIT */
+	       Package(){0x000DFFFF, 1, 0, 40},		/* PMC */
+	       Package(){0x000EFFFF, 0, 0, 25},		/* Audio */
+	       Package(){0x000FFFFF, 0, 0, 20},		/* CSE */
+	       Package(){0x0011FFFF, 0, 0, 26},		/* ISH */
+	       Package(){0x0012FFFF, 0, 0, 19},		/* SATA */
+	       Package(){0x0013FFFF, 0, 0, 22},		/* PCIe-A 0 */
+	       Package(){0x0014FFFF, 0, 0, 22},		/* PCIe-B 0 */
+	       Package(){0x0015FFFF, 0, 0, 17},		/* xHCI */
+	       Package(){0x0015FFFF, 1, 0, 13},		/* xDCI */
+	       Package(){0x0016FFFF, 0, 0, 27},		/* I2C0 */
+	       Package(){0x0016FFFF, 1, 0, 28},		/* I2C1 */
+	       Package(){0x0016FFFF, 2, 0, 29},		/* I2C2 */
+	       Package(){0x0016FFFF, 3, 0, 30},		/* I2C3 */
+	       Package(){0x0017FFFF, 0, 0, 31},		/* I2C4 */
+	       Package(){0x0017FFFF, 1, 0, 32},		/* I2C5 */
+	       Package(){0x0017FFFF, 2, 0, 33},		/* I2C6 */
+	       Package(){0x0017FFFF, 3, 0, 34},		/* I2C7 */
+	       Package(){0x0018FFFF, 0, 0, 4},		/* UART0 */
+	       Package(){0x0018FFFF, 1, 0, 5},		/* UART1 */
+	       Package(){0x0018FFFF, 2, 0, 6},		/* UART2 */
+	       Package(){0x0018FFFF, 3, 0, 7},		/* UART3 */
+	       Package(){0x0019FFFF, 0, 0, 35},		/* SPI0 */
+	       Package(){0x0019FFFF, 1, 0, 36},		/* SPI1 */
+	       Package(){0x0019FFFF, 2, 0, 37},		/* SPI2 */
+	       Package(){0x001BFFFF, 0, 0, 3},		/* SDCard */
+	       Package(){0x001CFFFF, 0, 0, 39},		/* eMMC */
+	       Package(){0x001EFFFF, 0, 0, 42},		/* SDIO */
+	       Package(){0x001FFFFF, 0, 0, 20},		/* LPC */
+	       }
+	)
+}