[coreboot-gerrit] Patch set updated for coreboot: drivers/intel: Add FSP 2.0 skeleton infrastructure

[Alexandru Gagniuc (mr.nuke.me@gmail.com)]

Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13328

-gerrit

commit 06e0d8d99379cccfaed5567d69e5518689fcd90b
Author: Andrey Petrov <andrey.petrov at intel.com>
Date:   Tue Oct 27 16:27:26 2015 -0700

    drivers/intel: Add FSP 2.0 skeleton infrastructure
    
    Change-Id: If5bea40112ef40eb54aa37e2880fe70075f9e02b
    Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
---
 src/drivers/intel/Kconfig             |  1 +
 src/drivers/intel/Makefile.inc        |  1 +
 src/drivers/intel/fsp2_0/Kconfig      | 56 +++++++++++++++++++++++++++++++++++
 src/drivers/intel/fsp2_0/Makefile.inc | 10 +++++++
 4 files changed, 68 insertions(+)

diff --git a/src/drivers/intel/Kconfig b/src/drivers/intel/Kconfig
index 19986f4..e5525d8 100644
--- a/src/drivers/intel/Kconfig
+++ b/src/drivers/intel/Kconfig
@@ -14,5 +14,6 @@
 ##
 
 source src/drivers/intel/fsp1_1/Kconfig
+source src/drivers/intel/fsp2_0/Kconfig
 source src/drivers/intel/gma/Kconfig
 source src/drivers/intel/i210/Kconfig
diff --git a/src/drivers/intel/Makefile.inc b/src/drivers/intel/Makefile.inc
index e54f07b..67c1163 100644
--- a/src/drivers/intel/Makefile.inc
+++ b/src/drivers/intel/Makefile.inc
@@ -2,4 +2,5 @@ subdirs-y += gma
 subdirs-$(CONFIG_GENERATE_SMBIOS_TABLES) += wifi
 subdirs-$(CONFIG_PLATFORM_USES_FSP1_0) += fsp1_0
 subdirs-$(CONFIG_PLATFORM_USES_FSP1_1) += fsp1_1
+subdirs-$(CONFIG_PLATFORM_USES_FSP2_0) += fsp2_0
 subdirs-$(CONFIG_DRIVER_INTEL_I210) += i210
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
new file mode 100644
index 0000000..a029965
--- /dev/null
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -0,0 +1,56 @@
+config PLATFORM_USES_FSP2_0
+	bool
+	help
+	  Include FSP 2.0 wrappers and functionality
+
+if PLATFORM_USES_FSP2_0
+
+comment "Intel FSP 2.0"
+
+config ADD_FSP_BINARIES
+	bool "Add Intel FSP 2.0 binaries to CBFS"
+	help
+	  Add the FSP-M and FSP-S binaries to CBFS. Note that coreboot does not
+	  use the FSP-T binary, so that will not be included.
+
+if ADD_FSP_BINARIES
+
+config FSP_M_FILE
+	string "Intel FSP-M (memory init) binary path and filename"
+	help
+	  The path and filename of the Intel FSP-M binary for this platform.
+
+config FSP_S_FILE
+	string "Intel FSP-S (silicon init) binary path and filename"
+	help
+	  The path and filename of the Intel FSP-S binary for this platform.
+
+endif # ADD_FSP_BINARIES
+
+# Cache As RAM region layout:
+#
+# +-------------+ DCACHE_RAM_BASE + DCACHE_RAM_SIZE    [0xfef80000]
+# |             |
+# |   FSP-M     |
+# |   code      |
+# |             |
+# +-------------+ FSP-M                                [0xfef30000]
+# |  romstage   |
+# |    code     |
+# +-------------+ ROMSTAGE_CAR_ADDR                    [0xfef28000]
+# |  FIT TABLE  |
+# +-------------+ FIT_CAR_ADDR                         [0xfef27c00]
+# |   FSP-M     |
+# | stack/data  |
+# +-------------+ DCACHE_RAM_BASE + 0x4000             [0xfef04000]
+# |  Stack      |
+# |    |        |
+# |    v        |
+# +-------------+
+# |    ^        |
+# |    |        |
+# | CAR Globals |
+# +-------------+ DCACHE_RAM_BASE                      [0xfef00000]
+
+
+endif # PLATFORM_USES_FSP2_0
diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc
new file mode 100644
index 0000000..c85b4bc
--- /dev/null
+++ b/src/drivers/intel/fsp2_0/Makefile.inc
@@ -0,0 +1,10 @@
+
+CPPFLAGS_common += -I$(src)/drivers/intel/fsp2_0/include
+
+cbfs-files-$(CONFIG_ADD_FSP_BINARIES) += blobs/fsp-m.bin
+blobs/fsp-m.bin-file := $(call strip_quotes,$(CONFIG_FSP_M_FILE))
+blobs/fsp-m.bin-type := raw
+
+cbfs-files-$(CONFIG_ADD_FSP_BINARIES) += blobs/fsp-s.bin
+blobs/fsp-s.bin-file := $(call strip_quotes,$(CONFIG_FSP_S_FILE))
+blobs/fsp-s.bin-type := raw