[coreboot-gerrit] New patch to review for coreboot: mb/intel/d510mo: GPIO and GPEN fix

[Damien Zammit (damien@zamaudio.com)]

Damien Zammit (damien at zamaudio.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13452

-gerrit

commit 1216827b4d9ca8fc32b401edf1adc0a2010e71dd
Author: Damien Zammit <damien at zamaudio.com>
Date:   Tue Jan 26 13:52:33 2016 +1100

    mb/intel/d510mo: GPIO and GPEN fix
    
    Change-Id: I56c0a55d57d8beabcb33cf1984b037556a71a8b9
    Signed-off-by: Damien Zammit <damien at zamaudio.com>
---
 src/mainboard/intel/d510mo/devicetree.cb | 1 +
 src/mainboard/intel/d510mo/romstage.c    | 1 +
 2 files changed, 2 insertions(+)

diff --git a/src/mainboard/intel/d510mo/devicetree.cb b/src/mainboard/intel/d510mo/devicetree.cb
index 221cc54..c6f39a0 100644
--- a/src/mainboard/intel/d510mo/devicetree.cb
+++ b/src/mainboard/intel/d510mo/devicetree.cb
@@ -36,6 +36,7 @@ chip northbridge/intel/pineview		# Northbridge
       register "ide_enable_primary" = "0x1"
       register "ide_enable_secondary" = "0x0"
       register "sata_ahci" = "0x0"
+      register "gpe0_en" = "0x20000040"
 
       device pci 1b.0 on end		# Audio
       device pci 1c.0 on end		# PCIe 1
diff --git a/src/mainboard/intel/d510mo/romstage.c b/src/mainboard/intel/d510mo/romstage.c
index b0bd0c0..6b4f0f6 100644
--- a/src/mainboard/intel/d510mo/romstage.c
+++ b/src/mainboard/intel/d510mo/romstage.c
@@ -50,6 +50,7 @@ static void mb_gpio_init(void)
 	outl(0x1ff9f7c1, DEFAULT_GPIOBASE + 0x00); /* GPIO_USE_SEL */
 	outl(0xe0e9e803, DEFAULT_GPIOBASE + 0x04); /* GP_IO_SEL */
 	outl(0xece9e842, DEFAULT_GPIOBASE + 0x0c); /* GP_LVL */
+	outl(0x00000000, DEFAULT_GPIOBASE + 0x18); /* GPO_BLINK */
 	outl(0x00002000, DEFAULT_GPIOBASE + 0x2c); /* GPI_INV */
 	outl(0x000000fe, DEFAULT_GPIOBASE + 0x30);
 	outl(0x0000007e, DEFAULT_GPIOBASE + 0x34);