[coreboot-gerrit] Patch set updated for coreboot: include/device: Move inline functions from pci_def.h to pci.h

Alexandru Gagniuc (mr.nuke.me@gmail.com) gerrit at coreboot.org
Mon Jan 25 21:01:43 CET 2016


Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13300

-gerrit

commit 12ffdeae44b5df6a105eac2be169aa9bac22fc6d
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date:   Tue Jan 5 17:00:27 2016 -0800

    include/device: Move inline functions from pci_def.h to pci.h
    
    pci_def.h is supposed to only contain definitions, such that it may be
    included in assembly files. Declaration of functions in said file
    prevents that.
    
    Change-Id: I0f90a74291c8a2ef7a1e1027d2d2182f896050fb
    Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
 src/include/device/pci.h     | 7 +++++++
 src/include/device/pci_def.h | 7 -------
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index fe31b54..9ef3614 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -119,6 +119,13 @@ unsigned pci_find_capability(device_t dev, unsigned cap);
 void pci_early_bridge_init(void);
 int pci_early_device_probe(u8 bus, u8 dev, u32 mmio_base);
 
+#ifndef __ROMCC__
+static inline int pci_base_address_is_memory_space(unsigned int attr)
+{
+	return (attr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY;
+}
+#endif
+
 #endif /* CONFIG_PCI */
 
 #endif /* PCI_H */
diff --git a/src/include/device/pci_def.h b/src/include/device/pci_def.h
index 04cf945..ef3427b 100644
--- a/src/include/device/pci_def.h
+++ b/src/include/device/pci_def.h
@@ -78,13 +78,6 @@
 #define  PCI_BASE_ADDRESS_IO_ATTR_MASK	0x03
 /* bit 1 is reserved if address_space = 1 */
 
-#ifndef __ROMCC__
-static inline int pci_base_address_is_memory_space(unsigned int attr)
-{
-	return (attr & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY;
-}
-#endif
-
 /* Header type 0 (normal devices) */
 #define PCI_CARDBUS_CIS		0x28
 #define PCI_SUBSYSTEM_VENDOR_ID	0x2c



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