[coreboot-gerrit] Patch set updated for coreboot: drivers/intel/fsp2_0: Load and pass Video Bios Table to FSP

[Alexandru Gagniuc (mr.nuke.me@gmail.com)]

Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13384

-gerrit

commit dd63f57cd74c8419bfaee48d54f9a7a1cefb39e8
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date:   Tue Dec 15 14:55:01 2015 -0800

    drivers/intel/fsp2_0: Load and pass Video Bios Table to FSP
    
    The Video Bios Table is needed by FSP to initialize the display.
    
    Change-Id: Ieae32811d371c10b8c81a5eabe12ee2cb2b2b2f8
    Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
---
 src/drivers/intel/fsp2_0/Kconfig        | 13 +++++++++++++
 src/drivers/intel/fsp2_0/Makefile.inc   |  4 ++++
 src/drivers/intel/fsp2_0/silicon_init.c | 14 ++++++++++++++
 3 files changed, 31 insertions(+)

diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index 3c81eb9..b367b78 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -26,6 +26,19 @@ config FSP_S_FILE
 	  The path and filename of the Intel FSP-S binary for this platform.
 
 
+config ADD_VBT_DATA_FILE
+	bool "Add a Video Bios Table (VBT) binary to CBFS"
+	help
+	  Add a VBT file data file to CBFS. The VBT describes the integrated
+	  GPU and connections, and is needed by FSP in order to initialize the
+	  display.
+
+config VBT_FILE
+	string "VBT binary path and filename"
+	depends on ADD_VBT_DATA_FILE
+	help
+	  The path and filename of the VBT binary for this platform.
+
 config FIT_CAR_ADDR
 	hex
 	default 0xfef27c00
diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc
index ffb3c4c..d210c21 100644
--- a/src/drivers/intel/fsp2_0/Makefile.inc
+++ b/src/drivers/intel/fsp2_0/Makefile.inc
@@ -17,3 +17,7 @@ blobs/fsp-m.bin-type := raw
 cbfs-files-$(CONFIG_ADD_FSP_BINARIES) += blobs/fsp-s.bin
 blobs/fsp-s.bin-file := $(call strip_quotes,$(CONFIG_FSP_S_FILE))
 blobs/fsp-s.bin-type := raw
+
+cbfs-files-$(CONFIG_ADD_VBT_DATA_FILE) += vbt.bin
+vbt.bin-file := $(call strip_quotes,$(CONFIG_VBT_FILE))
+vbt.bin-type := raw
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index 575c2eb..8730845 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -11,6 +11,7 @@
  */
 
 #include <arch/cpu.h>
+#include <cbfs.h>
 #include <console/console.h>
 #include <fsp/api.h>
 #include <fsp/util.h>
@@ -21,6 +22,17 @@ typedef asmlinkage enum fsp_status (*fsp_silicon_init_fn)
 
 extern struct fsp_header *fsps_hdr;
 
+static uintptr_t load_vbt(void)
+{
+	void *vbt;
+
+	vbt = cbfs_boot_map_with_leak("vbt.bin", CBFS_TYPE_RAW, NULL);
+	if (!vbt)
+		printk(BIOS_NOTICE, "Could not locate a VBT file in CBFS\n");
+
+	return (uintptr_t)vbt;
+}
+
 static enum fsp_status do_silicon_init(struct fsp_header *hdr)
 {
 	struct SILICON_INIT_UPD silicon_upd, *upd_region;
@@ -34,6 +46,8 @@ static enum fsp_status do_silicon_init(struct fsp_header *hdr)
 
 	silicon_init = (void *)(hdr->image_base + hdr->silicon_init_entry_offset);
 
+	/* Load VBT first, in case platform callback wishes to patch it */
+	silicon_upd.GraphicsConfigPtr = load_vbt();
 	/* give a chance to populate entries */
 	platform_fsp_silicon_init_params_cb(&silicon_upd);