[coreboot-gerrit] Patch set updated for coreboot: soc/apollolake: Only allow mmaped accesses to IFD BIOS region

[Alexandru Gagniuc (mr.nuke.me@gmail.com)]

Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13326

-gerrit

commit da78a5b3f886a0145f0e590b7be8daace9700a66
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date:   Wed Oct 28 12:28:41 2015 -0700

    soc/apollolake: Only allow mmaped accesses to IFD BIOS region
    
    Only the BIOS region is memory-mapped by the hardware. Anything below
    that is invisible via MMIO. Also, the 256 KiB right below 4G are being
    decoded by readonly SRAM. Fail accesses to those regions, rather than
    returning false data.
    
    Change-Id: I34779109ffce50a1c5a4842d7bf75870b8b4dff8
    Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
---
 src/soc/intel/apollolake/Kconfig     | 14 ++++++++++++++
 src/soc/intel/apollolake/mmap_boot.c | 32 ++++++++++++++++++++------------
 2 files changed, 34 insertions(+), 12 deletions(-)

diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 7851463..bf72a1f 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -69,6 +69,20 @@ config DCACHE_RAM_BOOTBLOCK_STACK_SIZE
 	  The amount of anticipated stack usage from the bootblock during
 	  pre-romstage initialization.
 
+config IFD_BIOS_START
+	hex
+	default 0x1000
+	help
+	  The starting address of flash region 1 (BIOS), as declared in the
+	  firmware descriptor. This can be obtained via 'ifdtool -d'.
+
+config IFD_BIOS_END
+	hex
+	default ROM_SIZE
+	help
+	  The ending address of flash region 1 (BIOS), as declared in the
+	  firmware descriptor. This can be obtained via 'ifdtool -d'.
+
 config CPU_ADDR_BITS
 	int
 	default 36
diff --git a/src/soc/intel/apollolake/mmap_boot.c b/src/soc/intel/apollolake/mmap_boot.c
index 7e9080b..60f7c1a 100644
--- a/src/soc/intel/apollolake/mmap_boot.c
+++ b/src/soc/intel/apollolake/mmap_boot.c
@@ -3,6 +3,7 @@
  *
  * Copyright (C) 2015 Intel Corp.
  * (Written by Andrey Petrov <andrey.petrov at intel.com> for Intel Corp.)
+ * (Written by Alexandru Gagniuc <alexandrux.gagniuc at intel.com> for Intel Corp.)
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -11,31 +12,38 @@
  */
 
 #include <boot_device.h>
-#include <console/console.h>
 #include <cbfs.h>
-#include <endian.h>
-#include <stdlib.h>
 #include <commonlib/region.h>
+#include <console/console.h>
 #include <fmap.h>
+#include <stdlib.h>
+#include <string.h>
+
+/* The 256 KiB right below 4G are decoded by readonly SRAM, not boot media */
+#define IFD_BIOS_MAX_MAPPED	(CONFIG_IFD_BIOS_END - 256 * KiB)
+#define IFD_MAPPED_SIZE		(IFD_BIOS_MAX_MAPPED - CONFIG_IFD_BIOS_START)
+#define IFD_BIOS_SIZE		(CONFIG_IFD_BIOS_END - CONFIG_IFD_BIOS_START)
 
 /*
  *  If Apollo Lake is configured to boot from SPI flash "BIOS" region
  *  (as defined in descriptor) is mapped below 4GiB.  Form a pointer for
  *  the base.
  */
-#define ROM_BASE ((void *)(uintptr_t)(0x100000000ULL - CONFIG_IFD_BIOS_SIZE))
+#define VIRTUAL_ROM_BASE ((uintptr_t)(0x100000000ULL - IFD_BIOS_SIZE))
 
-static const struct mem_region_device boot_dev = {
-	.base = (void *) ROM_BASE,
-	/* typically not whole flash is memory mapped */
-	.rdev = REGION_DEV_INIT(&mem_rdev_ops, CONFIG_IFD_BIOS_START,
-							CONFIG_IFD_BIOS_SIZE)
-};
+static const struct mem_region_device shadow_dev = MEM_REGION_DEV_INIT(
+	VIRTUAL_ROM_BASE, IFD_BIOS_MAX_MAPPED
+);
+
+static const struct xlate_region_device real_dev = XLATE_REGION_INIT(
+		&shadow_dev.rdev, CONFIG_IFD_BIOS_START,
+		IFD_MAPPED_SIZE, CONFIG_ROM_SIZE
+);
 
 const struct region_device *boot_device_ro(void)
 {
-	return &boot_dev.rdev;
-}
+	return &real_dev.rdev;
+};
 
 static int iafw_boot_region_properties(struct cbfs_props *props)
 {