[coreboot-gerrit] Patch set updated for coreboot: arch/x86: Allow boot flow which runs CAR setup in bootblock

Alexandru Gagniuc (mr.nuke.me@gmail.com) gerrit at coreboot.org
Mon Jan 25 17:49:10 CET 2016


Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/11784

-gerrit

commit 6e0d5486141f9964c9c411a7b3681e768b9884a2
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date:   Fri Oct 2 12:42:26 2015 -0700

    arch/x86: Allow boot flow which runs CAR setup in bootblock
    
    Some newer x86 systems can boot from non-memory-mapped boot media
    (e.g. EMMC). The bootblock may be backed by small amounts of SRAM, or
    other memory, similar to how most ARM chipsets work. In such cases, we
    may not have enough code space for romstage very early on. This means
    that CAR setup and early boot media (e.g. SPI, EMMC) drivers need to
    be implemented within the limited amount memory of storage available.
    Since the reset vector has to be contained in this early code memory,
    the bootblock is the best place to implement loading of other stages.
    
    This patch only adds the infrastructure to intercept the boot flow of
    the bootblock before jumping to ROMCC segments, after which the
    execution is passed to platform-specific code.
    
    Change-Id: Icbf5804b66b9517f9ceb352bed86978dcf92228f
    Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
 src/arch/x86/Makefile.inc       |  8 +++---
 src/arch/x86/bootblock.S        | 40 -----------------------------
 src/arch/x86/bootblock_crt0.S   | 56 +++++++++++++++++++++++++++++++++++++++++
 src/arch/x86/bootblock_legacy.S | 53 ++++++++++++++++++++++++++++++++++++++
 4 files changed, 112 insertions(+), 45 deletions(-)

diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index bc4a7d4..99ce184 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -107,14 +107,12 @@ bootblock-y += memcpy.c
 bootblock-y += memset.c
 bootblock-y += mmap_boot.c
 
-# Add the assembly file that pulls in the rest of the dependencies in
-# the right order. Make sure the auto generated bootblock.inc is a proper
-# dependency. Make the same true for the linker sript.
 bootblock-y += id.S
 $(obj)/arch/x86/id.bootblock.o: $(obj)/build.h
 
 ifeq ($(CONFIG_C_ENVIRONMENT_BOOTBLOCK),y)
 
+bootblock-y += bootblock_crt0.S
 bootblock-y += memlayout.ld
 
 ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32),y)
@@ -132,9 +130,9 @@ else
 LDFLAGS_bootblock += -m elf_x86_64 --oformat elf64-x86-64
 endif
 
-bootblock-y += bootblock.S
+bootblock-y += bootblock_legacy.S
 bootblock-y += walkcbfs.S
-$(obj)/arch/x86/bootblock.bootblock.o: $(objgenerated)/bootblock.inc
+$(obj)/arch/x86/bootblock_legacy.bootblock.o: $(objgenerated)/bootblock.inc
 
 bootblock-y += bootblock.ld
 $(obj)/arch/x86/bootblock.bootblock.ld: $(objgenerated)/bootblock.ld
diff --git a/src/arch/x86/bootblock.S b/src/arch/x86/bootblock.S
deleted file mode 100644
index 27a23eb..0000000
--- a/src/arch/x86/bootblock.S
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2015 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/* This file assembles the bootblock program by the order of the includes. Thus,
- * it's extremely important that one pays very careful attention to the order
- * of the includes. */
-
-#include <arch/x86/prologue.inc>
-#include <cpu/x86/16bit/entry16.inc>
-#include <cpu/x86/16bit/reset16.inc>
-#include <cpu/x86/32bit/entry32.inc>
-
-#ifdef CONFIG_CHIPSET_BOOTBLOCK_INCLUDE
-#include CONFIG_CHIPSET_BOOTBLOCK_INCLUDE
-#endif
-
-#if IS_ENABLED(CONFIG_SSE)
-#include <cpu/x86/sse_enable.inc>
-#endif
-
-/*
- * This bootblock.inc file is generated by ROMCC. The above program flow
- * falls through to this point. ROMCC assumes the last function it parsed
- * is the main function and it places its instructions at the beginning of
- * the generated file. Moreover, any library/common code needed in bootblock
- * needs to come after bootblock.inc.
- */
-#include <generated/bootblock.inc>
diff --git a/src/arch/x86/bootblock_crt0.S b/src/arch/x86/bootblock_crt0.S
new file mode 100644
index 0000000..aee5075
--- /dev/null
+++ b/src/arch/x86/bootblock_crt0.S
@@ -0,0 +1,56 @@
+/*
+ * This is the modern bootblock. It is used by platforms which select
+ * C_ENVIRONMENT_BOOTBLOCK, and it prepares the system for C environment runtime
+ * setup. The actual setup is done by hardware-specific code.
+ *
+ * It provides a bootflow similar to other architectures, and thus is considered
+ * to be the modern approach.
+ *
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Alexandru Gagniuc <mr.nuke.me at gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#define CR0_MP		(1 << 1)
+#define CR0_EM		(1 << 2)
+
+#define CR4_OSFXSR	(1 << 9)
+#define CR4_OSXMMEXCPT	(1 << 10)
+
+/*
+ * Include the old code for reset vector and protected mode entry. That code has
+ * withstood the test of time.
+ */
+#include <arch/x86/prologue.inc>
+#include <cpu/x86/16bit/entry16.inc>
+#include <cpu/x86/16bit/reset16.inc>
+#include <cpu/x86/32bit/entry32.inc>
+
+.intel_syntax noprefix
+
+bootblock_protected_mode_entry:
+	/* Save BIST result */
+	movd	mm0, eax
+	/* Save an early timestamp */
+	rdtsc
+	movd	mm1, eax
+	movd	mm2, edx
+
+#if !IS_ENABLED(CONFIG_SSE)
+enable_sse:
+	mov	eax, cr0
+	and	ax, not CR0_EM		/* Clear coprocessor emulation CR0.EM */
+	or	ax, CR0_MP		/* Set coprocessor monitoring  CR0.MP */
+	mov	cr0, eax
+	mov	eax, cr4
+	or	ax, (CR4_OSFXSR | CR4_OSXMMEXCPT)
+	mov	cr4, eax
+#endif /* IS_ENABLED(CONFIG_SSE) */
+
+	/* We're done. Now it's up to platform-specific code */
+	jmp	bootblock_pre_c_entry
diff --git a/src/arch/x86/bootblock_legacy.S b/src/arch/x86/bootblock_legacy.S
new file mode 100644
index 0000000..6c1723a
--- /dev/null
+++ b/src/arch/x86/bootblock_legacy.S
@@ -0,0 +1,53 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * This is the original bootblock used by coreboot on x86 systems. It contains
+ * a monolithic code flow, assembled from the following stages:
+ *     - reset16.inc: the reset vector
+ *     - entry16.inc: protected mode setup
+ *     - entry32.inc: segment descriptor setup
+ *     - CONFIG_CHIPSET_BOOTBLOCK_INCLUDE: chipset-specific initialization
+ *     - generated/bootblock.inc: ROMCC part of the bootblock
+ *
+ * This is used on platforms which do not select C_ENVIRONMENT_BOOTBLOCK, and it
+ * tries to do the absolute minimum before walking CBFS and jumping to romstage.
+ *
+ * This file assembles the bootblock program by the order of the includes. Thus,
+ * it's extremely important that one pays very careful attention to the order
+ * of the includes.
+ */
+
+#include <arch/x86/prologue.inc>
+#include <cpu/x86/16bit/entry16.inc>
+#include <cpu/x86/16bit/reset16.inc>
+#include <cpu/x86/32bit/entry32.inc>
+
+#ifdef CONFIG_CHIPSET_BOOTBLOCK_INCLUDE
+#include CONFIG_CHIPSET_BOOTBLOCK_INCLUDE
+#endif
+
+#if IS_ENABLED(CONFIG_SSE)
+#include <cpu/x86/sse_enable.inc>
+#endif
+
+/*
+ * This bootblock.inc file is generated by ROMCC. The above program flow
+ * falls through to this point. ROMCC assumes the last function it parsed
+ * is the main function and it places its instructions at the beginning of
+ * the generated file. Moreover, any library/common code needed in bootblock
+ * needs to come after bootblock.inc.
+ */
+#include <generated/bootblock.inc>



More information about the coreboot-gerrit mailing list