[coreboot-gerrit] Patch set updated for coreboot: drivers/intel/fsp2_0: Change memory layout newer FSP version

Alexandru Gagniuc (mr.nuke.me@gmail.com) gerrit at coreboot.org
Mon Jan 25 06:41:58 CET 2016


Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13397

-gerrit

commit 5897ca86aa6d3f38badc4fb231e02721a81b1b86
Author: Zhao, Lijian <lijian.zhao at intel.com>
Date:   Thu Dec 10 17:35:25 2015 -0800

    drivers/intel/fsp2_0: Change memory layout newer FSP version
    
    FSP memory layout changed. It now requires 1MiB of CAR versis 512 KiB
    it required before. FSP team promises that they are working to reduce
    CAR usage back to 512KiB.
    
    Change-Id: I936097a97598a84530d28981794e15693a361a89
    Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
---
 src/drivers/intel/fsp2_0/Kconfig | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig
index b367b78..bfba51a 100644
--- a/src/drivers/intel/fsp2_0/Kconfig
+++ b/src/drivers/intel/fsp2_0/Kconfig
@@ -41,21 +41,23 @@ config VBT_FILE
 
 config FIT_CAR_ADDR
 	hex
-	default 0xfef27c00
+	default 0xfef2dc00
 
 # Cache As RAM region layout:
 #
-# +-------------+ DCACHE_RAM_BASE + DCACHE_RAM_SIZE    [0xfef80000]
+# +-------------+ DCACHE_RAM_BASE + DCACHE_RAM_SIZE    [0xff000000]
+# |   Unused    |
+# +-------------+ ---------------------------------    [0xfefa0000]
 # |             |
 # |   FSP-M     |
 # |   code      |
 # |             |
-# +-------------+ FSP-M                                [0xfef30000]
+# +-------------+ FSP-M                                [0xfef50000]
 # |  romstage   |
 # |    code     |
-# +-------------+ ROMSTAGE_CAR_ADDR                    [0xfef28000]
+# +-------------+ ROMSTAGE_CAR_ADDR                    [0xfef2e000]
 # |  FIT TABLE  |
-# +-------------+ FIT_CAR_ADDR                         [0xfef27c00]
+# +-------------+ FIT_CAR_ADDR                         [0xfef2dc00]
 # |   FSP-M     |
 # | stack/data  |
 # +-------------+ DCACHE_RAM_BASE + 0x4000             [0xfef04000]



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