[coreboot-gerrit] Patch set updated for coreboot: intel/apollolake_rvp: Configure CLKREQ pins for PCIe

[Alexandru Gagniuc (mr.nuke.me@gmail.com)]

Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13406

-gerrit

commit af1c782adc7c1930040cecbc54a052dc6b19ad23
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date:   Thu Dec 17 14:12:01 2015 -0800

    intel/apollolake_rvp: Configure CLKREQ pins for PCIe
    
    These pads function as CLKREQ inputs if configured as native function.
    
    Change-Id: Ia86b76fa441028cc2d4467faebdc499c5339b6ca
    Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
---
 src/mainboard/intel/apollolake_rvp/mainboard.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/mainboard/intel/apollolake_rvp/mainboard.c b/src/mainboard/intel/apollolake_rvp/mainboard.c
index 8a0ab2a..dc7bc1e 100644
--- a/src/mainboard/intel/apollolake_rvp/mainboard.c
+++ b/src/mainboard/intel/apollolake_rvp/mainboard.c
@@ -21,6 +21,10 @@ static const struct pad_config aplk_rvp_gpios[] = {
 	PAD_CFG_NF(GPIO_193, NATIVE, DEEP, NF1),	/* PANEL0_VDDEN */
 	PAD_CFG_NF(GPIO_194, NATIVE, DEEP, NF1),	/* PANEL0_BKLTEN */
 	PAD_CFG_NF(GPIO_195, NATIVE, DEEP, NF1),	/* PANEL0_BKLTCTL */
+	PAD_CFG_NF(GPIO_209, NATIVE, DEEP, NF1),	/* PCIE_CLKREQ0_B */
+	PAD_CFG_NF(GPIO_210, NATIVE, DEEP, NF1),	/* PCIE_CLKREQ1_B */
+	PAD_CFG_NF(GPIO_211, NATIVE, DEEP, NF1),	/* PCIE_CLKREQ2_B */
+	PAD_CFG_NF(GPIO_212, NATIVE, DEEP, NF1),	/* PCIE_CLKREQ3_B */
 };
 
 static void mainboard_init(void *chip_info)