[coreboot-gerrit] Patch set updated for coreboot: soc/apollolake: Refactor GPIO macros to better match skylake

[Alexandru Gagniuc (mr.nuke.me@gmail.com)]

Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13317

-gerrit

commit 3bae729ed23fc5fde63eaefa0c22d2af7057ae3a
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date:   Mon Oct 26 16:01:59 2015 -0700

    soc/apollolake: Refactor GPIO macros to better match skylake
    
    Apollolake GPIO subsystem is very similar to the one on skylake. Aaron
    wants the GPIO configuration tables to be consistent between skylake
    and apollolake boards. so we try to immitate the macros from skylake.
    
    Change-Id: I806896718fd12a46c1c5fc477de264756fb81273
    Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
---
 src/soc/intel/apollolake/gpio.c                  |  4 +--
 src/soc/intel/apollolake/include/soc/gpio.h      | 31 +++++++++++++++++++++++-
 src/soc/intel/apollolake/include/soc/gpio_defs.h | 14 ++++++-----
 src/soc/intel/apollolake/uart_early.c            | 13 +++-------
 4 files changed, 43 insertions(+), 19 deletions(-)

diff --git a/src/soc/intel/apollolake/gpio.c b/src/soc/intel/apollolake/gpio.c
index c60a39c..43e0b9b 100644
--- a/src/soc/intel/apollolake/gpio.c
+++ b/src/soc/intel/apollolake/gpio.c
@@ -46,6 +46,6 @@ void gpio_configure_pad(const struct pad_config *cfg)
 {
 	const struct pad_community *comm = gpio_get_community(cfg->pad);
 	uint16_t config_offset = PAD_CFG_OFFSET(cfg->pad - comm->first_pad);
-	iosf_write(comm->port, config_offset, cfg->config[0]);
-	iosf_write(comm->port, config_offset + 4, cfg->config[1]);
+	iosf_write(comm->port, config_offset, cfg->config0);
+	iosf_write(comm->port, config_offset + 4, cfg->config1);
 }
diff --git a/src/soc/intel/apollolake/include/soc/gpio.h b/src/soc/intel/apollolake/include/soc/gpio.h
index 43a242c..3c8d475 100644
--- a/src/soc/intel/apollolake/include/soc/gpio.h
+++ b/src/soc/intel/apollolake/include/soc/gpio.h
@@ -16,8 +16,37 @@
 #include <types.h>
 #include <soc/gpio_defs.h>
 
+#define PAD_FUNC(value)		PAD_CFG0_MODE_##value
+#define PAD_RESET(value)	PAD_CFG0_RESET_##value
+#define PAD_PULL(value)		PAD_CFG1_PULL_##value
+
+#define _PAD_CFG_STRUCT(__pad, __config0, __config1)	\
+	{					\
+		.pad = __pad,			\
+		.config0 = __config0,		\
+		.config1 = __config1,		\
+	}
+
+/* Native function configuration */
+#define PAD_CFG_NF(pad, pull, rst, func) \
+	_PAD_CFG_STRUCT(pad, PAD_RESET(rst) | PAD_FUNC(func), PAD_PULL(pull))
+
+/* General purpose output, no pullup/down. */
+#define PAD_CFG_GPO(pad, val, rst)	\
+	_PAD_CFG_STRUCT(pad,		\
+		PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_RX_DISABLE | !!val, \
+		PAD_PULL(NONE))
+
+/* General purpose input */
+#define PAD_CFG_GPI(pad, pull, rst) \
+	_PAD_CFG_STRUCT(pad,		\
+		PAD_FUNC(GPIO) | PAD_RESET(rst) | PAD_CFG0_TX_DISABLE, \
+		PAD_PULL(pull))
+
+
 struct pad_config {
-	uint32_t config[2];
+	uint32_t config0;
+	uint16_t config1;
 	uint16_t pad;
 };
 
diff --git a/src/soc/intel/apollolake/include/soc/gpio_defs.h b/src/soc/intel/apollolake/include/soc/gpio_defs.h
index f2bf00b..a1c3186 100644
--- a/src/soc/intel/apollolake/include/soc/gpio_defs.h
+++ b/src/soc/intel/apollolake/include/soc/gpio_defs.h
@@ -23,6 +23,9 @@
 #define PAD_CFG0_MODE_MASK		(7 << 10)
 #define  PAD_CFG0_MODE_GPIO		(0 << 10)
 #define  PAD_CFG0_MODE_FUNC(x)		((x) << 10)
+#define  PAD_CFG0_MODE_NF1		(1 << 10)
+#define  PAD_CFG0_MODE_NF2		(2 << 10)
+#define  PAD_CFG0_MODE_NF3		(3 << 10)
 #define PAD_CFG0_ROUTE_NMI		(1 << 17)
 #define PAD_CFG0_ROUTE_SMI		(1 << 18)
 #define PAD_CFG0_ROUTE_SCI		(1 << 19)
@@ -34,10 +37,10 @@
 #define  PAD_CFG0_TRIG_OFF		(2 << 25)
 #define  PAD_CFG0_TRIG_EDGE_BOTH	(3 << 25)
 #define PAD_CFG0_RESET_MASK		(3 << 30)
-#define  PAD_CFG0_RESET_STICKY		(0 << 30)
+#define  PAD_CFG0_RESET_PWROK		(0 << 30)
 #define  PAD_CFG0_RESET_DEEP		(1 << 30)
-#define  PAD_CFG0_RESET_GPIOR		(2 << 30)
-#define  PAD_CFG0_RESET_INACTIVE	(3 << 30)
+#define  PAD_CFG0_RESET_PLTRST		(2 << 30)
+#define  PAD_CFG0_RESET_RSMRST		(3 << 30)
 
 #define PAD_CFG1_PULL_MASK		(0xf << 12)
 #define  PAD_CFG1_PULL_NONE		(0x0 << 12)
@@ -323,11 +326,10 @@
 #define PAD_SW(pad)			(pad - SW_OFFSET)
 
 /* Default configurations */
-#define PAD_CFG0_DEFAULT_FUNC(x)	(0x44000000 | PAD_CFG0_MODE_FUNC(x))
+#define PAD_CFG0_DEFAULT_FUNC(x)	(PAD_CFG0_RESET_DEEP | PAD_CFG0_MODE_FUNC(x))
 #define PAD_CFG0_DEFAULT_NATIVE		PAD_CFG0_DEFAULT_FUNC(1)
 
-#define PAD_CFG1_DEFAULT_NOPULL		PAD_CFG1_PULL_NONE
 #define PAD_CFG1_DEFAULT_PULLUP		PAD_CFG1_PULL_UP_20K
-#define PAD_CFG1_DEFAULT_NATIVE			PAD_CFG1_PULL_NATIVE
+#define PAD_CFG1_DEFAULT_NATIVE		PAD_CFG1_PULL_NATIVE
 
 #endif /* _SOC_APOLLOLAKE_GPIO_DEFS_H_ */
diff --git a/src/soc/intel/apollolake/uart_early.c b/src/soc/intel/apollolake/uart_early.c
index aba23b0..be36023 100644
--- a/src/soc/intel/apollolake/uart_early.c
+++ b/src/soc/intel/apollolake/uart_early.c
@@ -16,16 +16,9 @@
 #include <soc/uart.h>
 
 static const struct pad_config uart_tx_pad_configs[] = {
-	{
-		.pad = GPIO_39,
-		.config = {PAD_CFG0_DEFAULT_FUNC(1), PAD_CFG1_DEFAULT_NATIVE},
-	}, {
-		.pad = GPIO_42,
-		.config = {PAD_CFG0_DEFAULT_FUNC(1), PAD_CFG1_DEFAULT_NATIVE},
-	}, {
-		.pad = GPIO_47,
-		.config = {PAD_CFG0_DEFAULT_FUNC(1), PAD_CFG1_DEFAULT_NATIVE},
-	},
+	PAD_CFG_NF(GPIO_39, NATIVE, DEEP, NF1),	/* UART0 TX*/
+	PAD_CFG_NF(GPIO_42, NATIVE, DEEP, NF1),	/* UART1 TX*/
+	PAD_CFG_NF(GPIO_47, NATIVE, DEEP, NF1),	/* UART2 TX*/
 };
 
 static void lpss_uart_write(uint16_t reg, uint32_t val)