[coreboot-gerrit] New patch to review for coreboot: soc/apollolake: Consolidate PCI IDs into one include file

Andrey Petrov (andrey.petrov@intel.com) gerrit at coreboot.org
Sun Jan 24 03:34:02 CET 2016


Andrey Petrov (andrey.petrov at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13388

-gerrit

commit 7e7d3179548065d0e9e7ab39825670d73669b13a
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date:   Wed Dec 23 11:53:01 2015 -0800

    soc/apollolake: Consolidate PCI IDs into one include file
    
    Change-Id: I31d7a8886b74b4406cbb8fec56cb648f76c76207
    Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
---
 src/soc/intel/apollolake/include/soc/pci_ids.h | 39 ++++++++++++++++++++++++++
 src/soc/intel/apollolake/lpc.c                 |  8 ++----
 src/soc/intel/apollolake/northbridge.c         |  8 ++----
 src/soc/intel/apollolake/uart.c                |  4 ++-
 4 files changed, 46 insertions(+), 13 deletions(-)

diff --git a/src/soc/intel/apollolake/include/soc/pci_ids.h b/src/soc/intel/apollolake/include/soc/pci_ids.h
new file mode 100644
index 0000000..4ef7e11
--- /dev/null
+++ b/src/soc/intel/apollolake/include/soc/pci_ids.h
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Alexandru Gagniuc <alexandrux.gagniuc at intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef _SOC_APOLLOLAKE_PCI_IDS_H_
+#define _SOC_APOLLOLAKE_PCI_IDS_H_
+
+#define PCI_DEV_ID_APOLLOLAKE_NB		0x5af0		/* 00:00.0 */
+#define PCI_DEV_ID_APOLLOLAKE_IGD		0x5a84		/* 00:02.0 */
+#define PCI_DEV_ID_APOLLOLAKE_P2SB		0x5a92		/* 00:0d.0 */
+#define PCI_DEV_ID_APOLLOLAKE_HWSEQ_SPI		0x5a96		/* 00:0d.2 */
+#define PCI_DEV_ID_APOLLOLAKE_AUDIO		0x5a98		/* 00:0e.0 */
+#define PCI_DEV_ID_APOLLOLAKE_SATA		0x5ae0		/* 00:12.0 */
+#define PCI_DEV_ID_APOLLOLAKE_I2C0		0x5aac		/* 00:16.0 */
+#define PCI_DEV_ID_APOLLOLAKE_I2C1		0x5aae		/* 00:16.1 */
+#define PCI_DEV_ID_APOLLOLAKE_I2C2		0x5ab0		/* 00:16.2 */
+#define PCI_DEV_ID_APOLLOLAKE_I2C3		0x5ab2		/* 00:16.3 */
+#define PCI_DEV_ID_APOLLOLAKE_I2C4		0x5ab4		/* 00:17.0 */
+#define PCI_DEV_ID_APOLLOLAKE_I2C5		0x5ab6		/* 00:17.1 */
+#define PCI_DEV_ID_APOLLOLAKE_I2C6		0x5ab8		/* 00:17.2 */
+#define PCI_DEV_ID_APOLLOLAKE_I2C7		0x5aba		/* 00:17.3 */
+#define PCI_DEV_ID_APOLLOLAKE_UART0		0x5abc		/* 00:18.0 */
+#define PCI_DEV_ID_APOLLOLAKE_UART1		0x5abe		/* 00:18.0 */
+#define PCI_DEV_ID_APOLLOLAKE_UART2		0x5ac0		/* 00:18.0 */
+#define PCI_DEV_ID_APOLLOLAKE_UART3		0x5aee		/* 00:18.0 */
+#define PCI_DEV_ID_APOLLOLAKE_SPI0		0x5ac2		/* 00:19.0 */
+#define PCI_DEV_ID_APOLLOLAKE_SPI1		0x5ac4		/* 00:19.1 */
+#define PCI_DEV_ID_APOLLOLAKE_SPI2		0x5ac6		/* 00:19.2 */
+#define PCI_DEV_ID_APOLLOLAKE_LPC		0x5ae8		/* 00:1f.0 */
+
+#endif /* _SOC_APOLLOLAKE_PCI_IDS_H_ */
diff --git a/src/soc/intel/apollolake/lpc.c b/src/soc/intel/apollolake/lpc.c
index 6d2e8ca..120b0e9 100644
--- a/src/soc/intel/apollolake/lpc.c
+++ b/src/soc/intel/apollolake/lpc.c
@@ -14,6 +14,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <soc/acpi.h>
+#include <soc/pci_ids.h>
 
 static void soc_lpc_add_io_resources(device_t dev)
 {
@@ -42,13 +43,8 @@ static struct device_operations device_ops = {
 	.write_acpi_tables = southbridge_write_acpi_tables,
 };
 
-static const unsigned short pci_device_ids[] = {
-	0x5AE8,
-	0
-};
-
 static const struct pci_driver soc_lpc __pci_driver = {
 	.ops = &device_ops,
 	.vendor = PCI_VENDOR_ID_INTEL,
-	.devices = pci_device_ids,
+	.device = PCI_DEV_ID_APOLLOLAKE_LPC,
 };
diff --git a/src/soc/intel/apollolake/northbridge.c b/src/soc/intel/apollolake/northbridge.c
index 70355d0..eccfe23 100644
--- a/src/soc/intel/apollolake/northbridge.c
+++ b/src/soc/intel/apollolake/northbridge.c
@@ -16,6 +16,7 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <soc/northbridge.h>
+#include <soc/pci_ids.h>
 
 static uint32_t get_bar(device_t dev, unsigned int index)
 {
@@ -124,13 +125,8 @@ static struct device_operations northbridge_ops = {
 	.enable           = DEVICE_NOOP
 };
 
-static const unsigned short northbridge_ids[] = {
-	MCH_APOLLOLAKE_ID,
-	0
-};
-
 static const struct pci_driver northbridge_driver __pci_driver = {
 	.ops     = &northbridge_ops,
 	.vendor  = PCI_VENDOR_ID_INTEL,
-	.devices = northbridge_ids
+	.device  = PCI_DEV_ID_APOLLOLAKE_NB
 };
diff --git a/src/soc/intel/apollolake/uart.c b/src/soc/intel/apollolake/uart.c
index ec4b68c..4d7e747 100644
--- a/src/soc/intel/apollolake/uart.c
+++ b/src/soc/intel/apollolake/uart.c
@@ -14,6 +14,7 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
+#include <soc/pci_ids.h>
 
 /*
  * Shadow BAR for console UART:
@@ -55,7 +56,8 @@ static struct device_operations uart_ops = {
 };
 
 static const unsigned short uart_ids[] = {
-	0x5abc, 0x5abe, 0x5ac0, 0x5aee,
+	PCI_DEV_ID_APOLLOLAKE_UART0, PCI_DEV_ID_APOLLOLAKE_UART1,
+	PCI_DEV_ID_APOLLOLAKE_UART2, PCI_DEV_ID_APOLLOLAKE_UART3,
 	0
 };
 



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