[coreboot-gerrit] Patch set updated for coreboot: intel/strago: Enable native mode on sd card cd line

[Hannah Williams (hannah.williams@intel.com)]

Hannah Williams (hannah.williams at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12741

-gerrit

commit d4ead70f7ae49544829483074150ac83d1f9f62e
Author: Jagadish Krishnamoorthy <jagadish.krishnamoorthy at intel.com>
Date:   Wed Nov 4 14:25:15 2015 -0800

    intel/strago: Enable native mode on sd card cd line
    
    Configuring Native Mode enables the card present bit in
    sd card controller register.
    
    TEST=Sd Card Plug/Unplug should work in OS and DepthCharge.
    
    Original-Reviewed-on: https://chromium-review.googlesource.com/310847
    Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
    
    Change-Id: I2f017bdd7125f324fb58a88485cd83110851fbc5
    Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy at intel.com>
    Signed-off-by: Hannah Williams <hannah.williams at intel.com>
---
 src/mainboard/intel/strago/gpio.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mainboard/intel/strago/gpio.c b/src/mainboard/intel/strago/gpio.c
old mode 100755
new mode 100644
index 8b6a0e7..b686853
--- a/src/mainboard/intel/strago/gpio.c
+++ b/src/mainboard/intel/strago/gpio.c
@@ -74,7 +74,7 @@ static const struct soc_gpio_map gpse_gpio_map[] = {
 	Native_M1, /* 78  SDMMC3_PWR_EN_B */
 	GPIO_NC, /* 79  GPI ILB_SERIRQ */
 	Native_M1, /* 80  USB_OC0_B */
-	NATIVE_INT(1, L1), /* 81  SDMMC3_CD_B */
+	NATIVE_INT_PU20K(1, L1), /* 81  SDMMC3_CD_B */
 	GPIO_NC,  /* 82  spkr	 asummed gpio number */
 	Native_M1, /* 83 SUSPWRDNACK */
 	SPARE_PIN,/* 84 spare pin */