[coreboot-gerrit] Patch merged into coreboot/master: google/lars: Correct the output for crossystem wpsw_boot

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit d4fd0a0fc13453b91342c02877363842acb38fc6
Author: david <david_wu at quantatw.com>
Date:   Wed Dec 9 15:29:06 2015 +0800

    google/lars: Correct the output for crossystem wpsw_boot
    
    The write protect GPIO is not being configured early enough.
    This is leading to coreboot reading incorrect value, and
    writing the incorrect value in vboot shared file.
    This is leading to "crossystem wpsw_boot" always returning 0
    even with the write protect screw in place during boot.
    
    BRANCH=none
    BUG=chrome-os-partner:48292
    TEST=Build and boot on lars
    
    Change-Id: I28fbbd690ca6efb539422e9ba02f10e07cd35346
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: d229ba9d8934dcb5f22b27ce0ad27601ec87d6ff
    Original-Change-Id: I64f2497a6bb3a50b0f58c67e2ab6751c4836fd89
    Original-Signed-off-by: David Wu <David_Wu at quantatw.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/317130
    Original-Commit-Ready: David Wu <david_wu at quantatw.com>
    Original-Tested-by: David Wu <david_wu at quantatw.com>
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://review.coreboot.org/12966
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth <martinroth at google.com>


See https://review.coreboot.org/12966 for details.

-gerrit