[coreboot-gerrit] Patch set updated for coreboot: nb/intel/pineview: Use macro names for memory base registers

Damien Zammit (damien@zamaudio.com) gerrit at coreboot.org
Mon Jan 18 11:38:51 CET 2016


Damien Zammit (damien at zamaudio.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13032

-gerrit

commit 22cec3a9589da04b152ff099e906ce7b6376a729
Author: Damien Zammit <damien at zamaudio.com>
Date:   Mon Jan 18 16:37:41 2016 +1100

    nb/intel/pineview: Use macro names for memory base registers
    
    Change-Id: I0b79ddcf9248c6a6964dd60e30a6ea18e27bc186
    Signed-off-by: Damien Zammit <damien at zamaudio.com>
---
 src/northbridge/intel/pineview/northbridge.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/northbridge/intel/pineview/northbridge.c b/src/northbridge/intel/pineview/northbridge.c
index 21f133d..0f534dc 100644
--- a/src/northbridge/intel/pineview/northbridge.c
+++ b/src/northbridge/intel/pineview/northbridge.c
@@ -45,15 +45,15 @@ static void mch_domain_read_resources(device_t dev)
 	pci_domain_read_resources(dev);
 
 	/* Top of Upper Usable DRAM, including remap */
-	touud = pci_read_config16(dev, 0xa2);
+	touud = pci_read_config16(dev, TOUUD);
 	touud <<= 20;
 
 	/* Top of Lower Usable DRAM */
-	tolud = pci_read_config16(dev, 0xb0) & 0xfff0;
+	tolud = pci_read_config16(dev, TOLUD) & 0xfff0;
 	tolud <<= 16;
 
 	/* Top of Memory - does not account for any UMA */
-	tom = pci_read_config16(dev, 0xa0) & 0x1ff;
+	tom = pci_read_config16(dev, TOM) & 0x1ff;
 	tom <<= 27;
 
 	printk(BIOS_DEBUG, "TOUUD 0x%llx TOLUD 0x%08x TOM 0x%llx\n",



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