[coreboot-gerrit] Patch set updated for coreboot: google/lars: add nhlt support

[Martin Roth (martinroth@google.com)]

Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12961

-gerrit

commit 6b1bec06479e394e57358c837bea53e5b7d24dcb
Author: Subrata Banik <subrata.banik at intel.com>
Date:   Tue Dec 8 14:26:49 2015 +0530

    google/lars: add nhlt support
    
    Provide an option for including the NHLT blobs within the
    lars mainboard directory while also adding the ACPI NHLT
    table generation that the current hardware supports.
    
    BUG=chrome-os-partner:44481
    BRANCH=None
    TEST=Built and booted lars board.
    Audio worked with MAXIM audio card.
    
    Change-Id: I1b7836c685ebbe1498f3dbaa2eb64d5e0d4faabb
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 401f1a7b23dca19712517ed1588e1390769d1271
    Original-Change-Id: I6a937872a9e10d2c5ea15d5952d23e98416df092
    Original-Signed-off-by: Subrata Banik <subrata.banik at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/316092
    Original-Commit-Ready: Nicolas Boichat <drinkcat at chromium.org>
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/mainboard/google/lars/Kconfig     |  6 ++++++
 src/mainboard/google/lars/mainboard.c | 38 +++++++++++++++++++++++++++++++++++
 2 files changed, 44 insertions(+)

diff --git a/src/mainboard/google/lars/Kconfig b/src/mainboard/google/lars/Kconfig
index 2bf2547..e227d4d 100644
--- a/src/mainboard/google/lars/Kconfig
+++ b/src/mainboard/google/lars/Kconfig
@@ -52,4 +52,10 @@ config MAX_CPUS
 	int
 	default 8
 
+config INCLUDE_NHLT_BLOBS
+	bool "Include blobs for audio."
+	select NHLT_DMIC_2CH
+	select NHLT_MAX98357
+	select NHLT_NAU88L25
+
 endif
diff --git a/src/mainboard/google/lars/mainboard.c b/src/mainboard/google/lars/mainboard.c
index bf54747..6725f13 100644
--- a/src/mainboard/google/lars/mainboard.c
+++ b/src/mainboard/google/lars/mainboard.c
@@ -15,8 +15,11 @@
  * GNU General Public License for more details.
  */
 
+#include <arch/acpi.h>
+#include <console/console.h>
 #include <device/device.h>
 #include <stdlib.h>
+#include <soc/nhlt.h>
 #include "ec.h"
 
 static void mainboard_init(device_t dev)
@@ -24,6 +27,40 @@ static void mainboard_init(device_t dev)
 	mainboard_ec_init();
 }
 
+static unsigned long mainboard_write_acpi_tables(
+	device_t device, unsigned long current, acpi_rsdp_t *rsdp)
+{
+		uintptr_t start_addr;
+		uintptr_t end_addr;
+		struct nhlt *nhlt;
+
+		start_addr = current;
+
+		nhlt = nhlt_init();
+
+		if (nhlt == NULL)
+			return start_addr;
+
+		/* 2 Channel DMIC array. */
+		if (nhlt_soc_add_dmic_array(nhlt, 2))
+			printk(BIOS_ERR, "Couldn't add 2CH DMIC array.\n");
+
+		/* MAXIM Smart Amps for left and right. */
+		if (nhlt_soc_add_max98357(nhlt, AUDIO_LINK_SSP0))
+			printk(BIOS_ERR, "Couldn't add max98357.\n");
+
+		/* NAU88l25 Headset codec. */
+		if (nhlt_soc_add_nau88l25(nhlt, AUDIO_LINK_SSP1))
+			printk(BIOS_ERR, "Couldn't add headset codec.\n");
+
+		end_addr = nhlt_soc_serialize(nhlt, start_addr);
+
+		if (end_addr != start_addr)
+			acpi_add_table(rsdp, (void *)start_addr);
+
+		return end_addr;
+}
+
 /*
  * mainboard_enable is executed as first thing after
  * enumerate_buses().
@@ -31,6 +68,7 @@ static void mainboard_init(device_t dev)
 static void mainboard_enable(device_t dev)
 {
 	dev->ops->init = mainboard_init;
+	dev->ops->write_acpi_tables = mainboard_write_acpi_tables;
 }
 
 struct chip_operations mainboard_ops = {