[coreboot-gerrit] Patch merged into coreboot/master: google/lars: Disable SD 3.0 Controller [D30:F6]

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 0ab8e00aebd360b5b99690de4948004dc2738770
Author: Subrata Banik <subrata.banik at intel.com>
Date:   Wed Dec 2 12:25:37 2015 +0530

    google/lars: Disable SD 3.0 Controller [D30:F6]
    
    LARs design don't have SD Connector over native SD Controller.
    
    BUG=chrome-os-partner:48190
    BRANCH=None
    TEST=Build & boot LARs. Use "lspci" doesn't list 0x1E:06
    device in list.
    CQ-DEPEND=CL:315420
    
    Change-Id: Idff7243a6aaf4b8d5f49e4bf215a77131f716485
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: ca769138b97b404598c4a6bfa6c2ff5c1c3ec896
    Original-Change-Id: I71416ac89a8c91ab272d6737d1b46c8045567e17
    Original-Signed-off-by: Subrata Banik <subrata.banik at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/315423
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://review.coreboot.org/12947
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth <martinroth at google.com>


See https://review.coreboot.org/12947 for details.

-gerrit