[coreboot-gerrit] Patch merged into coreboot/master: intel/skylake: Update UPD parameters as per FSP 1.8.0

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit b57772d2bf117e81b9e3cbb9d08ffbfae581ba69
Author: Barnali Sarkar <barnali.sarkar at intel.com>
Date:   Mon Nov 2 18:58:36 2015 +0530

    intel/skylake: Update UPD parameters as per FSP 1.8.0
    
    Some MemoryInit UPD parameters have been moved to
    SiliconInit in FSP 1.8.0. This patch has the respective
    changes in coreboot for this.
    
    BRANCH=none
    BUG=none
    TEST=Build and booted in kunimitsu
    
    CQ-DEPEND=CL:*237423, CL:*237424
    
    Change-Id: Ic008d22f96fb5f14965e5b5db15e05fb39dd52d3
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 573c1d8325cd504213528030ecf99559402b5118
    Original-Change-Id: I71b893aa7788519ed2ef15f3247945ffcbbbcf4d
    Original-Signed-off-by: Barnali Sarkar <barnali.sarkar at intel.com>
    Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/310191
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://review.coreboot.org/12940
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth <martinroth at google.com>


See https://review.coreboot.org/12940 for details.

-gerrit