[coreboot-gerrit] New patch to review for coreboot: intel/skylake: Change in UPD name from SkipMpInit to FspSkipMpInit

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12993

-gerrit

commit 45e570e6b0d2bbaac44ce3555f697a3d1298050b
Author: Barnali Sarkar <barnali.sarkar at intel.com>
Date:   Mon Dec 21 11:45:05 2015 +0530

    intel/skylake: Change in UPD name from SkipMpInit to FspSkipMpInit
    
    Changing the UPD param name from "SkipMpInit" to "FspSkipMpInit"
    
    BRANCH=none
    BUG=none
    TEST=Build and booted in kunimitsu with FspSkipMpInit token
    enabled from Coreboot.
    
    Change-Id: I5ebe7a1338ac77a62d5aa2e48e083b4fb906bf28
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: cdaa95a82bc7e90637c6b90e33d88d040e085f58
    Original-Change-Id: Ibdaa3d202f8f6f6f0ca6c6d4c6428f1616572f1d
    Original-Signed-off-by: Barnali Sarkar <barnali.sarkar at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/319353
    Original-Commit-Ready: Preetham Chandrian <preetham.chandrian at intel.com>
    Original-Tested-by: Preetham Chandrian <preetham.chandrian at intel.com>
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/intel/skylake/chip.c | 2 +-
 src/soc/intel/skylake/chip.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c
index b6485f7..12942ca 100644
--- a/src/soc/intel/skylake/chip.c
+++ b/src/soc/intel/skylake/chip.c
@@ -345,7 +345,7 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
 	params->SerialIrqConfigSirqMode = config->SerialIrqConfigSirqMode;
 	params->SerialIrqConfigStartFramePulse = config->SerialIrqConfigStartFramePulse;
 
-	params->SkipMpInit = config->SkipMpInit;
+	params->SkipMpInit = config->FspSkipMpInit;
 
 	/*
 	 * To disable Heci, the Psf needs to be left unlocked
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h
index afb9967..f18c9d3 100644
--- a/src/soc/intel/skylake/chip.h
+++ b/src/soc/intel/skylake/chip.h
@@ -308,7 +308,7 @@ struct soc_intel_skylake_config {
 	 * Values: 0: PchSfpw4Clk, 1: PchSfpw6Clk, 2; PchSfpw8Clk.
 	 */
 	u8 SerialIrqConfigStartFramePulse;
-	u8 SkipMpInit;
+	u8 FspSkipMpInit;
 	/* VrConfig Settings for 5 domains
 	 * 0 = System Agent, 1 = IA Core, 2 = Ring,
 	 * 3 = GT unsliced,  4 = GT sliced