[coreboot-gerrit] Patch merged into coreboot/master: intel/kunimitsu: Correct the output for crossystem wpsw_boot
gerrit at coreboot.org
gerrit at coreboot.org
Fri Jan 15 11:56:53 CET 2016
the following patch was just integrated into master:
commit 3b43fa90866ade5805e95ea522aa0f43820550e8
Author: Arindam Roy <arindam.roy at intel.com>
Date: Fri Dec 4 16:46:24 2015 -0800
intel/kunimitsu: Correct the output for crossystem wpsw_boot
The write protect GPIO is not being configured early enough.
This is leading to coreboot reading incorrect value, and
writing the incorrect value in vboot shared file.
This is leading to "crossystem wpsw_boot" always returning 0
even with the write protect screw in place during boot.
BUG=chrome-os-partner:48292
BRANCH=None
TEST=Boot with the write protect screw in place. Issue
crossystem wpsw_boot. It should show 1.
Change-Id: I3a333a4dcce31be9afe28cf11b127090cc7b9421
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 462dd0229c2d3b81cd34bdd2e36bea844f58586c
Original-Change-Id: Ib7e0539845575b32322e243e89b81ffee077eb81
Original-Signed-off-by: Arindam Roy <arindam.roy at intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/316009
Original-Commit-Ready: Arindam Roy <rarindam at gmail.com>
Original-Tested-by: Arindam Roy <rarindam at gmail.com>
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: https://review.coreboot.org/12952
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth at google.com>
See https://review.coreboot.org/12952 for details.
-gerrit
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