[coreboot-gerrit] Patch set updated for coreboot: Braswell: Separate L1 Sub State init procedure for boards.

[Hannah Williams (hannah.williams@intel.com)]

Hannah Williams (hannah.williams at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12750

-gerrit

commit aca68b7fec8bdbc428d26c94c15a9421f980a26e
Author: Kenji Chen <kenji.chen at intel.com>
Date:   Mon Nov 16 17:08:32 2015 +0800

    Braswell: Separate L1 Sub State init procedure for boards.
    
    Original-Reviewed-on: https://chromium-review.googlesource.com/312743
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Signed-off-by: Kenji Chen <kenji.chen at intel.com>
    
    Change-Id: Ib0a891f229477cf359bff6cd02f305606468f07f
    Signed-off-by: Hannah Williams <hannah.williams at intel.com>
---
 src/mainboard/google/cyan/Kconfig  | 1 +
 src/mainboard/intel/strago/Kconfig | 1 +
 src/soc/intel/braswell/Kconfig     | 1 -
 3 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/google/cyan/Kconfig b/src/mainboard/google/cyan/Kconfig
index 7a3a11a..81120d7 100644
--- a/src/mainboard/google/cyan/Kconfig
+++ b/src/mainboard/google/cyan/Kconfig
@@ -13,6 +13,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select MAINBOARD_HAS_LPC_TPM
 	select SOC_INTEL_BRASWELL
 	select HAVE_ACPI_RESUME
+	select PCIEXP_L1_SUB_STATE
 
 config CHROMEOS
 	select LID_SWITCH
diff --git a/src/mainboard/intel/strago/Kconfig b/src/mainboard/intel/strago/Kconfig
index facd97f..f69160f 100755
--- a/src/mainboard/intel/strago/Kconfig
+++ b/src/mainboard/intel/strago/Kconfig
@@ -13,6 +13,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select MAINBOARD_HAS_CHROMEOS
 	select MAINBOARD_HAS_LPC_TPM
 	select SOC_INTEL_BRASWELL
+	select PCIEXP_L1_SUB_STATE
 
 config CHROMEOS
 	select LID_SWITCH
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 11d946a..70bedc3 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -28,7 +28,6 @@ config CPU_SPECIFIC_OPTIONS
 	select PCIEXP_ASPM
 	select PCIEXP_CLK_PM
 	select PCIEXP_COMMON_CLOCK
-	select PCIEXP_L1_SUB_STATE
 	select PLATFORM_USES_FSP1_1
 	select REG_SCRIPT
 	select SOC_INTEL_COMMON