[coreboot-gerrit] Patch merged into coreboot/master: fsp_baytrail: Add additional PCI space above 4GB

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit b95a0745865a084e5426b9930eba0dadd3301c23
Author: Martin Roth <martinroth at google.com>
Date:   Tue Dec 22 12:40:53 2015 -0700

    fsp_baytrail: Add additional PCI space above 4GB
    
    This just tells the OS that it can use the 16GB of address space
    at the 48GB mark for PCI.  This is the upper 16GB of Bay Trail's 36 bit
    physical address space.
    
    This could be hardcoded into the UMEM definition, but doing it this way
    makes it more plain what it's doing, and allows for modification
    to put it just above the top of upper memory, similar to what is done
    with the standard PCI region above the top of low memory.
    
    Change-Id: Id6208c3712e5d94d62a83c4ac69e8ffd0e19f4ad
    Signed-off-by: Martin Roth <martinroth at google.com>
    Reviewed-on: https://review.coreboot.org/12791
    Tested-by: build bot (Jenkins)
    Reviewed-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
    Reviewed-by: York Yang <york.yang at intel.com>


See https://review.coreboot.org/12791 for details.

-gerrit