[coreboot-gerrit] Patch merged into coreboot/master: sb/amd/sr5650: Correctly locate CPU MMCONFIG resource

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 77133afe3142096cc7ea7755bfc727f59f2282f9
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date:   Fri Jan 1 23:30:42 2016 -0600

    sb/amd/sr5650: Correctly locate CPU MMCONFIG resource
    
    The code committed in GIT hash
     * 1eaaa0 southbridge/amd/sr5650:Add MCFG ACPI table support
    did not correctly locate the CPU MMCONFIG resource, leading to failures
    with operating systems and firmware (e.g. SeaBIOS) when the PCI
    extended configuration space option was activated.
    
    Due to the southbridge routing not being set up, MMCONFIG accesses were
    targetting DRAM and therefore the PCI devices were not being configured.
    The failure normally manifests as a system hang immediately after PCI
    configuration starts.
    
    Search for the CPU MMCONFIG resource on all domains below the root
    device.
    
    Change-Id: I0df2f825fef2de46563db87af78d0609ab3d8c5a
    Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
    Reviewed-on: https://review.coreboot.org/12821
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>


See https://review.coreboot.org/12821 for details.

-gerrit