[coreboot-gerrit] Patch set updated for coreboot: mb/ga-m57sli-s4: Fix early uart output
Arthur Heymans (arthur@aheymans.xyz)
gerrit at coreboot.org
Wed Dec 28 15:14:13 CET 2016
Arthur Heymans (arthur at aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17969
-gerrit
commit ba132ae5459127617fa8596e7e62172a38998f3b
Author: Arthur Heymans <arthur at aheymans.xyz>
Date: Tue Dec 27 01:08:02 2016 +0100
mb/ga-m57sli-s4: Fix early uart output
The console output is garbled until it is fixed in ramstage
by devicetree which sets the uart clock predivider correctly.
Change-Id: I6d6ec0febfec98a8d4a71e1476036c804cf5f08d
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
src/mainboard/gigabyte/m57sli/romstage.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c
index b12b12c..3648258 100644
--- a/src/mainboard/gigabyte/m57sli/romstage.c
+++ b/src/mainboard/gigabyte/m57sli/romstage.c
@@ -130,7 +130,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
it8716f_enable_dev(SERIAL_DEV, CONFIG_TTYS0_BASE);
pnp_exit_ext_func_mode(SERIAL_DEV);
#endif
- ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_48);
+ ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_24);
ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
setup_mb_resource_map();
More information about the coreboot-gerrit
mailing list