[coreboot-gerrit] New patch to review for coreboot: util/inteltool: Fix ICH7 SPIBAR registers
Arthur Heymans (arthur@aheymans.xyz)
gerrit at coreboot.org
Wed Dec 28 13:56:34 CET 2016
Arthur Heymans (arthur at aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17978
-gerrit
commit a49138de419585cddaf2002790b76ffb11918434
Author: Arthur Heymans <arthur at aheymans.xyz>
Date: Wed Dec 28 13:55:23 2016 +0100
util/inteltool: Fix ICH7 SPIBAR registers
The ICH7 SPIBAR registers are different from ICH8 and later.
Change-Id: I7691bce619089b15805114047bcb1fd121a5722b
Signed-off-by: Arthur Heymans <arthur at aheymans.xyz>
---
util/inteltool/spi.c | 26 ++++++++++++++++++++++----
1 file changed, 22 insertions(+), 4 deletions(-)
diff --git a/util/inteltool/spi.c b/util/inteltool/spi.c
index bd584b6..c0f5989 100644
--- a/util/inteltool/spi.c
+++ b/util/inteltool/spi.c
@@ -47,6 +47,20 @@ static const io_register_t spi_bar_registers[] = {
{ SPIBAR + 0xd0, 4, "FPB - Flash Partition Boundary" },
};
+static const io_register_t ich7_spi_bar_registers[] = {
+ { SPIBAR + 0x00, 2, "SPIS - SPI Status" },
+ { SPIBAR + 0x02, 2, "SPIC - SPI Control" },
+ { SPIBAR + 0x04, 4, "SPIA - SPI Address" },
+ /* 0x08 .. 0x47 are filled with data */
+ { SPIBAR + 0x50, 4, "BBAR - BIOS Base Address Configuration" },
+ { SPIBAR + 0x54, 2, "PREOP Prefix Opcode Configuration" },
+ { SPIBAR + 0x56, 2, "OPTYPE Opcode Type Configuration" },
+ { SPIBAR + 0x58, 8, "OPMENU Opcode Menu Configuration" },
+ { SPIBAR + 0x60, 4, "PBR0 Protected BIOS Range 0" },
+ { SPIBAR + 0x64, 4, "PBR1 Protected BIOS Range 1" },
+ { SPIBAR + 0x68, 4, "PBR2 Protected BIOS Range 2" },
+};
+
int print_bioscntl(struct pci_dev *sb)
{
int i, size = 0;
@@ -105,10 +119,6 @@ int print_spibar(struct pci_dev *sb) {
switch (sb->device_id) {
case PCI_DEVICE_ID_INTEL_ICH6:
- case PCI_DEVICE_ID_INTEL_ICH7:
- case PCI_DEVICE_ID_INTEL_ICH7M:
- case PCI_DEVICE_ID_INTEL_ICH7DH:
- case PCI_DEVICE_ID_INTEL_ICH7MDH:
case PCI_DEVICE_ID_INTEL_ICH8:
case PCI_DEVICE_ID_INTEL_ICH8M:
case PCI_DEVICE_ID_INTEL_ICH8ME:
@@ -175,6 +185,14 @@ int print_spibar(struct pci_dev *sb) {
size = ARRAY_SIZE(spi_bar_registers);
spi_register = spi_bar_registers;
break;
+ case PCI_DEVICE_ID_INTEL_ICH7:
+ case PCI_DEVICE_ID_INTEL_ICH7M:
+ case PCI_DEVICE_ID_INTEL_ICH7DH:
+ case PCI_DEVICE_ID_INTEL_ICH7MDH:
+ rcba_phys = pci_read_long(sb, 0xf0) & 0xfffffffe;
+ size = ARRAY_SIZE(ich7_spi_bar_registers);
+ spi_register = ich7_spi_bar_registers;
+ break;
case PCI_DEVICE_ID_INTEL_ICH:
case PCI_DEVICE_ID_INTEL_ICH0:
case PCI_DEVICE_ID_INTEL_ICH2:
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