[coreboot-gerrit] Patch set updated for coreboot: spi: Get rid of SPI_ATOMIC_SEQUENCING
Furquan Shaikh (furquan@google.com)
gerrit at coreboot.org
Tue Dec 6 06:37:55 CET 2016
Furquan Shaikh (furquan at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17681
-gerrit
commit 285ab4c148fbb9121ee5eaf02ff8197f5b85d0e7
Author: Furquan Shaikh <furquan at chromium.org>
Date: Tue Nov 29 22:07:42 2016 -0800
spi: Get rid of SPI_ATOMIC_SEQUENCING
SPI_ATOMIC_SEQUENCING was added to accomodate spi flash controllers with
the ability to perform tx and rx of flash command and response at the
same time. Instead of introducing this notion at SPI flash driver layer,
clean up the interface to SPI used by flash.
Flash uses a command-response kind of communication. Thus, even though
SPI is duplex, flash command needs to be sent out on SPI bus and then
flash response should be received on the bus. Some specialized x86
flash controllers are capable of handling command and response in a
single transaction.
In order to support all the varied cases:
1. Add spi_xfer_vector that takes as input a vector of SPI operations
and calls back into SPI controller driver to process these operations.
2. In order to accomodate flash command-response model, use two vectors
while calling into spi_xfer_vector -- one with dout set to
non-NULL(command) and other with din set to non-NULL(response).
3. For specialized SPI flash controllers combine two successive vectors
if the transactions look like a command-response pair.
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully
Change-Id: I4c9e78c585ad95c40c0d5af078ff8251da286236
Signed-off-by: Furquan Shaikh <furquan at chromium.org>
---
src/drivers/spi/Kconfig | 10 ------
src/drivers/spi/spi-generic.c | 19 ++++++++---
src/drivers/spi/spi_flash.c | 47 +++++++++------------------
src/include/spi-generic.h | 34 ++++++++++++++++++--
src/mainboard/google/purin/Kconfig | 1 -
src/soc/broadcom/cygnus/spi.c | 48 +++++++++++++++++++++++++++-
src/soc/imgtec/pistachio/Kconfig | 1 -
src/soc/imgtec/pistachio/spi.c | 54 ++++++++++++++++++++++++++++----
src/soc/intel/baytrail/spi.c | 48 +++++++++++++++++++++++++++-
src/soc/intel/braswell/spi.c | 48 +++++++++++++++++++++++++++-
src/soc/intel/broadwell/spi.c | 48 +++++++++++++++++++++++++++-
src/soc/intel/fsp_baytrail/spi.c | 48 +++++++++++++++++++++++++++-
src/soc/intel/fsp_broadwell_de/spi.c | 48 +++++++++++++++++++++++++++-
src/soc/marvell/armada38x/spi.c | 33 +++++++++++++------
src/soc/mediatek/mt8173/Kconfig | 1 -
src/soc/mediatek/mt8173/spi.c | 48 +++++++++++++++++++++++++++-
src/soc/nvidia/tegra124/spi.c | 22 +++++++++++--
src/soc/nvidia/tegra210/spi.c | 22 +++++++++++--
src/soc/qualcomm/ipq40xx/Kconfig | 1 -
src/soc/qualcomm/ipq40xx/spi.c | 48 +++++++++++++++++++++++++++-
src/soc/qualcomm/ipq806x/Kconfig | 1 -
src/soc/qualcomm/ipq806x/spi.c | 48 +++++++++++++++++++++++++++-
src/soc/rockchip/common/spi.c | 22 +++++++++++--
src/soc/samsung/exynos5420/spi.c | 20 ++++++++++--
src/southbridge/amd/agesa/hudson/spi.c | 48 +++++++++++++++++++++++++++-
src/southbridge/amd/cimx/sb800/spi.c | 48 +++++++++++++++++++++++++++-
src/southbridge/amd/sb700/spi.c | 48 +++++++++++++++++++++++++++-
src/southbridge/intel/common/spi.c | 48 +++++++++++++++++++++++++++-
src/southbridge/intel/fsp_rangeley/spi.c | 48 +++++++++++++++++++++++++++-
29 files changed, 866 insertions(+), 94 deletions(-)
diff --git a/src/drivers/spi/Kconfig b/src/drivers/spi/Kconfig
index b55de58..c8d86ff 100644
--- a/src/drivers/spi/Kconfig
+++ b/src/drivers/spi/Kconfig
@@ -61,16 +61,6 @@ config SPI_FLASH_INCLUDE_ALL_DRIVERS
default n if COMMON_CBFS_SPI_WRAPPER
default y
-config SPI_ATOMIC_SEQUENCING
- bool
- default y if ARCH_X86
- default n if !ARCH_X86
- help
- Select this option if the SPI controller uses "atomic sequencing."
- Atomic sequencing is when the sequence of commands is pre-programmed
- in the SPI controller. Hardware manages the transaction instead of
- software. This is common on x86 platforms.
-
config SPI_FLASH_SMM
bool "SPI flash driver support in SMM"
default n
diff --git a/src/drivers/spi/spi-generic.c b/src/drivers/spi/spi-generic.c
index 4fcd04c..0e8c1b4 100644
--- a/src/drivers/spi/spi-generic.c
+++ b/src/drivers/spi/spi-generic.c
@@ -32,16 +32,27 @@ void spi_release_bus(const struct spi_slave *slave)
ctrlr->release_bus(slave);
}
-int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout,
- void *din, size_t bytesin)
+int spi_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
{
const struct spi_ctrlr *ctrlr = slave->ctrlr;
- if (ctrlr && ctrlr->xfer)
- return ctrlr->xfer(slave, dout, bytesout, din, bytesin);
+ if (ctrlr && ctrlr->xfer_vector)
+ return ctrlr->xfer_vector(slave, vectors, count);
return -1;
}
+int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout,
+ void *din, size_t bytesin)
+{
+ struct spi_op vectors[] = {
+ { .dout = dout, .bytesout = bytesout,
+ .din = din, .bytesin = bytesin,
+ },
+ };
+ return spi_xfer_vector(slave, vectors, ARRAY_SIZE(vectors));
+}
+
void __attribute__((weak)) spi_init(void)
{
/* Default weak implementation - do nothing. */
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c
index 3b4272b..a0e3105 100644
--- a/src/drivers/spi/spi_flash.c
+++ b/src/drivers/spi/spi_flash.c
@@ -32,47 +32,30 @@ static void spi_flash_addr(u32 addr, u8 *cmd)
cmd[3] = addr >> 0;
}
-/*
- * If atomic sequencing is used, the cycle type is known to the SPI
- * controller so that it can perform consecutive transfers and arbitrate
- * automatically. Otherwise the SPI controller transfers whatever the
- * user requests immediately, without regard to sequence. Atomic
- * sequencing is commonly used on x86 platforms.
- *
- * SPI flash commands are simple two-step sequences. The command byte is
- * always written first and may be followed by an address. Then data is
- * either read or written. For atomic sequencing we'll pass everything into
- * spi_xfer() at once and let the controller handle the details. Otherwise
- * we will write all output bytes first and then read if necessary.
- *
- * FIXME: This really should be abstracted better, but that will
- * require overhauling the entire SPI infrastructure.
- */
static int do_spi_flash_cmd(const struct spi_slave *spi, const void *dout,
size_t bytes_out, void *din, size_t bytes_in)
{
int ret = 1;
+ /*
+ * SPI flash requires command-response kind of behavior. Thus, two
+ * separate SPI vectors are required -- first to transmit dout and other
+ * to receive in din. If some specialized SPI flash controllers
+ * (e.g. x86) can perform both command and response together, it should
+ * be handled at SPI flash controller driver level.
+ */
+ struct spi_op vectors[] = {
+ [0] = { .dout = dout, .bytesout = bytes_out,
+ .din = NULL, .bytesin = 0, },
+ [1] = { .dout = NULL, .bytesout = 0,
+ .din = din, .bytesin = bytes_in },
+ };
if (spi_claim_bus(spi))
return ret;
-#if CONFIG_SPI_ATOMIC_SEQUENCING == 1
- if (spi_xfer(spi, dout, bytes_out, din, bytes_in) < 0)
- goto done;
-#else
- if (dout && bytes_out) {
- if (spi_xfer(spi, dout, bytes_out, NULL, 0) < 0)
- goto done;
- }
-
- if (din && bytes_in) {
- if (spi_xfer(spi, NULL, 0, din, bytes_in) < 0)
- goto done;
- }
-#endif
+ if (spi_xfer_vector(spi, vectors, ARRAY_SIZE(vectors)) == 0)
+ ret = 0;
- ret = 0;
-done:
spi_release_bus(spi);
return ret;
}
diff --git a/src/include/spi-generic.h b/src/include/spi-generic.h
index d28fefd..b813bab 100644
--- a/src/include/spi-generic.h
+++ b/src/include/spi-generic.h
@@ -36,20 +36,35 @@ struct spi_slave {
const struct spi_ctrlr *ctrlr;
};
+/*
+ * Representation of a SPI operation.
+ *
+ * dout: Pointer to data to send.
+ * bytesout: Count of data in bytes to send.
+ * din: Pointer to store received data.
+ * bytesin: Count of data in bytes to receive.
+ */
+struct spi_op {
+ const void *dout;
+ size_t bytesout;
+ void *din;
+ size_t bytesin;
+};
+
/*-----------------------------------------------------------------------
* Representation of a SPI contoller.
*
* claim_bus: Claim SPI bus and prepare for communication.
* release_bus: Release SPI bus.
- * xfer: SPI transfer
* setup: Setup given SPI device bus.
+ * xfer_vector: Vector of SPI transfer operations.
*/
struct spi_ctrlr {
int (*claim_bus)(const struct spi_slave *slave);
void (*release_bus)(const struct spi_slave *slave);
- int (*xfer)(const struct spi_slave *slave, const void *dout,
- size_t bytesout, void *din, size_t bytesin);
int (*setup)(const struct spi_slave *slave);
+ int (*xfer_vector)(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count);
};
/*-----------------------------------------------------------------------
@@ -134,6 +149,19 @@ void spi_release_bus(const struct spi_slave *slave);
int spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytesout,
void *din, size_t bytesin);
+/*-----------------------------------------------------------------------
+ * Vector of SPI transfer operations
+ *
+ * spi_xfer_vector() interface:
+ * slave: The SPI slave which will be sending/receiving the data.
+ * vectors: Array of SPI op structures.
+ * count: Number of SPI op vectors.
+ *
+ * Returns: 0 on success, not 0 on failure
+ */
+int spi_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count);
+
unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len);
/*-----------------------------------------------------------------------
diff --git a/src/mainboard/google/purin/Kconfig b/src/mainboard/google/purin/Kconfig
index eabab2b..ca0909b 100644
--- a/src/mainboard/google/purin/Kconfig
+++ b/src/mainboard/google/purin/Kconfig
@@ -26,7 +26,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select SPI_FLASH
select SPI_FLASH_SPANSION
select SPI_FLASH_STMICRO # required for the reference board BCM958305K
- select SPI_ATOMIC_SEQUENCING
config CHROMEOS
select VBOOT_VBNV_FLASH
diff --git a/src/soc/broadcom/cygnus/spi.c b/src/soc/broadcom/cygnus/spi.c
index e597efc..c33c489 100644
--- a/src/soc/broadcom/cygnus/spi.c
+++ b/src/soc/broadcom/cygnus/spi.c
@@ -275,10 +275,56 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
return 0;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
.claim_bus = spi_ctrlr_claim_bus,
.release_bus = spi_ctrlr_release_bus,
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig
index da33cc5..1ce488c 100644
--- a/src/soc/imgtec/pistachio/Kconfig
+++ b/src/soc/imgtec/pistachio/Kconfig
@@ -22,7 +22,6 @@ config CPU_IMGTEC_PISTACHIO
select GENERIC_UDELAY
select HAVE_MONOTONIC_TIMER
select HAVE_UART_SPECIAL
- select SPI_ATOMIC_SEQUENCING
select GENERIC_GPIO_LIB
select HAVE_HARD_RESET
select UART_OVERRIDE_REFCLK
diff --git a/src/soc/imgtec/pistachio/spi.c b/src/soc/imgtec/pistachio/spi.c
index e956e46..c9d2591 100644
--- a/src/soc/imgtec/pistachio/spi.c
+++ b/src/soc/imgtec/pistachio/spi.c
@@ -22,10 +22,6 @@
#include <string.h>
#include <timer.h>
-#if !CONFIG_SPI_ATOMIC_SEQUENCING
-#error "Unsupported SPI driver API"
-#endif
-
/* Imgtec controller uses 16 bit packet length. */
#define IMGTEC_SPI_MAX_TRANSFER_SIZE ((1 << 16) - 1)
@@ -496,7 +492,7 @@ static int do_spi_xfer(const struct spi_slave *slave, const void *dout,
}
static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
- size_t bytesout, void *din, size_t bytesin)
+ size_t bytesout, void *din, size_t bytesin)
{
unsigned int in_sz, out_sz;
int ret;
@@ -537,10 +533,56 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
return SPIM_OK;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
.claim_bus = spi_ctrlr_claim_bus,
.release_bus = spi_ctrlr_release_bus,
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
/* Set up communications parameters for a SPI slave. */
diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c
index 0f7b0c6..633e7b9 100644
--- a/src/soc/intel/baytrail/spi.c
+++ b/src/soc/intel/baytrail/spi.c
@@ -610,8 +610,54 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
return 0;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c
index 2a0ddf8..a1454c2 100644
--- a/src/soc/intel/braswell/spi.c
+++ b/src/soc/intel/braswell/spi.c
@@ -594,8 +594,54 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
return 0;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c
index d2ae943..3d690d9 100644
--- a/src/soc/intel/broadwell/spi.c
+++ b/src/soc/intel/broadwell/spi.c
@@ -644,8 +644,54 @@ int spi_flash_protect(u32 start, u32 size)
return 0;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index 997bd13..124395c 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -590,8 +590,54 @@ spi_xfer_exit:
return 0;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/intel/fsp_broadwell_de/spi.c b/src/soc/intel/fsp_broadwell_de/spi.c
index 5848966..ddbab88 100644
--- a/src/soc/intel/fsp_broadwell_de/spi.c
+++ b/src/soc/intel/fsp_broadwell_de/spi.c
@@ -607,8 +607,54 @@ spi_xfer_exit:
return 0;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/marvell/armada38x/spi.c b/src/soc/marvell/armada38x/spi.c
index 25480e4..5ae0ace 100644
--- a/src/soc/marvell/armada38x/spi.c
+++ b/src/soc/marvell/armada38x/spi.c
@@ -465,21 +465,36 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave,
void *din,
size_t in_bytes)
{
- int ret = -1;
-
- if (out_bytes)
- ret = mrvl_spi_xfer(slave, out_bytes * 8, dout, din);
- else if (in_bytes)
- ret = mrvl_spi_xfer(slave, in_bytes * 8, dout, din);
- else
- die("Unexpected condition in spi_xfer\n");
+ int ret = 0;
+
+ if (dout && out_bytes)
+ ret = mrvl_spi_xfer(slave, out_bytes * 8, dout, NULL);
+ if (!ret && din && in_bytes)
+ ret = mrvl_spi_xfer(slave, in_bytes * 8, NULL, din);
return ret;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i;
+ int ret = 0;
+
+ for (i = 0; i < count; i++) {
+ ret = spi_ctrlr_xfer(slave, vectors[i].dout,
+ vectors[i].bytesout, vectors[i].din,
+ vectors[i].bytesin);
+
+ if (ret)
+ return ret;
+ }
+ return 0;
+}
+
static const spi_ctrlr spi_ctrlr = {
.claim_bus = spi_ctrlr_claim_bus,
.release_bus = spi_ctrlr_release_bus,
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/mediatek/mt8173/Kconfig b/src/soc/mediatek/mt8173/Kconfig
index ec3481e..7a6ad87 100644
--- a/src/soc/mediatek/mt8173/Kconfig
+++ b/src/soc/mediatek/mt8173/Kconfig
@@ -9,7 +9,6 @@ config SOC_MEDIATEK_MT8173
select ARM64_USE_ARM_TRUSTED_FIRMWARE
select BOOTBLOCK_CONSOLE
select HAVE_UART_SPECIAL
- select SPI_ATOMIC_SEQUENCING if SPI_FLASH
select HAVE_MONOTONIC_TIMER
select GENERIC_UDELAY
select GENERIC_GPIO_LIB
diff --git a/src/soc/mediatek/mt8173/spi.c b/src/soc/mediatek/mt8173/spi.c
index 53d5b8c..a010993 100644
--- a/src/soc/mediatek/mt8173/spi.c
+++ b/src/soc/mediatek/mt8173/spi.c
@@ -279,6 +279,52 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
return 0;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static void spi_ctrlr_release_bus(const struct spi_slave *slave)
{
struct mtk_spi_bus *mtk_slave = to_mtk_spi(slave);
@@ -292,7 +338,7 @@ static void spi_ctrlr_release_bus(const struct spi_slave *slave)
static const struct spi_ctrlr spi_ctrlr = {
.claim_bus = spi_ctrlr_claim_bus,
.release_bus = spi_ctrlr_release_bus,
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/nvidia/tegra124/spi.c b/src/soc/nvidia/tegra124/spi.c
index 5d8084f..d9d321b 100644
--- a/src/soc/nvidia/tegra124/spi.c
+++ b/src/soc/nvidia/tegra124/spi.c
@@ -719,8 +719,8 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return buf_len;
}
-static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
- size_t out_bytes, void *din, size_t in_bytes)
+static int __spi_xfer(const struct spi_slave *slave, const void *dout,
+ size_t out_bytes, void *din, size_t in_bytes)
{
struct tegra_spi_channel *spi = to_tegra_spi(slave->bus);
u8 *out_buf = (u8 *)dout;
@@ -798,10 +798,26 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
return ret;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ int ret;
+ size_t i;
+
+ for (i = 0; i < count; i++) {
+ ret = __spi_xfer(slave, vectors[i].dout, vectors[i].bytesout,
+ vectors[i].din, vectors[i].bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
.claim_bus = spi_ctrlr_claim_bus,
.release_bus = spi_ctrlr_release_bus,
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/nvidia/tegra210/spi.c b/src/soc/nvidia/tegra210/spi.c
index 2921355..c697a59 100644
--- a/src/soc/nvidia/tegra210/spi.c
+++ b/src/soc/nvidia/tegra210/spi.c
@@ -755,8 +755,8 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return buf_len;
}
-static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
- size_t out_bytes, void *din, size_t in_bytes)
+static int __spi_xfer(const struct spi_slave *slave, const void *dout,
+ size_t out_bytes, void *din, size_t in_bytes)
{
struct tegra_spi_channel *spi = to_tegra_spi(slave->bus);
u8 *out_buf = (u8 *)dout;
@@ -834,10 +834,26 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
return ret;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ int ret;
+ size_t i;
+
+ for (i = 0; i < count; i++) {
+ ret = __spi_xfer(slave, vectors[i].dout, vectors[i].bytesout,
+ vectors[i].din, vectors[i].bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
.claim_bus = spi_ctrlr_claim_bus,
.release_bus = spi_ctrlr_release_bus,
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
index f738622..05f29e4 100644
--- a/src/soc/qualcomm/ipq40xx/Kconfig
+++ b/src/soc/qualcomm/ipq40xx/Kconfig
@@ -7,7 +7,6 @@ config SOC_QC_IPQ40XX
select ARCH_RAMSTAGE_ARMV7
select BOOTBLOCK_CONSOLE
select HAVE_UART_SPECIAL
- select SPI_ATOMIC_SEQUENCING
select GENERIC_GPIO_LIB
select HAVE_MONOTONIC_TIMER
diff --git a/src/soc/qualcomm/ipq40xx/spi.c b/src/soc/qualcomm/ipq40xx/spi.c
index 6d044b3..72e573b 100644
--- a/src/soc/qualcomm/ipq40xx/spi.c
+++ b/src/soc/qualcomm/ipq40xx/spi.c
@@ -652,10 +652,56 @@ out:
return ret;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
.claim_bus = spi_ctrlr_claim_bus,
.release_bus = spi_ctrlr_release_bus,
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig
index 7ba5df5..32b61bc 100644
--- a/src/soc/qualcomm/ipq806x/Kconfig
+++ b/src/soc/qualcomm/ipq806x/Kconfig
@@ -7,7 +7,6 @@ config SOC_QC_IPQ806X
select ARCH_RAMSTAGE_ARMV7
select BOOTBLOCK_CONSOLE
select HAVE_UART_SPECIAL
- select SPI_ATOMIC_SEQUENCING
select GENERIC_GPIO_LIB
if SOC_QC_IPQ806X
diff --git a/src/soc/qualcomm/ipq806x/spi.c b/src/soc/qualcomm/ipq806x/spi.c
index e907729..eb8277e 100644
--- a/src/soc/qualcomm/ipq806x/spi.c
+++ b/src/soc/qualcomm/ipq806x/spi.c
@@ -757,10 +757,56 @@ out:
return ret;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
.claim_bus = spi_ctrlr_claim_bus,
.release_bus = spi_ctrlr_release_bus,
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/rockchip/common/spi.c b/src/soc/rockchip/common/spi.c
index 16143b5..e457324 100644
--- a/src/soc/rockchip/common/spi.c
+++ b/src/soc/rockchip/common/spi.c
@@ -256,8 +256,8 @@ unsigned int spi_crop_chunk(unsigned int cmd_len, unsigned int buf_len)
return min(65535, buf_len);
}
-static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
- size_t bytes_out, void *din, size_t bytes_in)
+static int __spi_xfer(const struct spi_slave *slave, const void *dout,
+ size_t bytes_out, void *din, size_t bytes_in)
{
struct rockchip_spi *regs = to_rockchip_spi(slave)->regs;
int ret = 0;
@@ -328,10 +328,26 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
return ret < 0 ? ret : 0;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ int ret;
+ size_t i;
+
+ for (i = 0; i < count; i++) {
+ ret = __spi_xfer(slave, vectors[i].dout, vectors[i].bytesout,
+ vectors[i].din, vectors[i].bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
.claim_bus = spi_ctrlr_claim_bus,
.release_bus = spi_ctrlr_release_bus,
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/soc/samsung/exynos5420/spi.c b/src/soc/samsung/exynos5420/spi.c
index f17566e..48f2767 100644
--- a/src/soc/samsung/exynos5420/spi.c
+++ b/src/soc/samsung/exynos5420/spi.c
@@ -177,7 +177,7 @@ static void spi_transfer(struct exynos_spi *regs, void *in, const void *out,
}
}
-static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout, size_t bytes_out,
+static int __spi_xfer(const struct spi_slave *slave, const void *dout, size_t bytes_out,
void *din, size_t bytes_in)
{
struct exynos_spi *regs = to_exynos_spi(slave)->regs;
@@ -208,10 +208,26 @@ static void spi_ctrlr_release_bus(const struct spi_slave *slave)
setbits_le32(®s->cs_reg, SPI_SLAVE_SIG_INACT);
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ int ret;
+ size_t i;
+
+ for (i = 0; i < count; i++) {
+ ret = __spi_xfer(slave, vectors[i].dout, vectors[i].bytesout,
+ vectors[i].din, vectors[i].bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
.claim_bus = spi_ctrlr_claim_bus,
.release_bus = spi_ctrlr_release_bus,
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c
index 8a4adfb..ebf5a70 100644
--- a/src/southbridge/amd/agesa/hudson/spi.c
+++ b/src/southbridge/amd/agesa/hudson/spi.c
@@ -165,8 +165,54 @@ int chipset_volatile_group_end(const struct spi_flash *flash)
return 0;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c
index edf192a..5ce6adb 100644
--- a/src/southbridge/amd/cimx/sb800/spi.c
+++ b/src/southbridge/amd/cimx/sb800/spi.c
@@ -156,8 +156,54 @@ int chipset_volatile_group_end(const struct spi_flash *flash)
return 0;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/southbridge/amd/sb700/spi.c b/src/southbridge/amd/sb700/spi.c
index 2e16ca8..ad2d813 100644
--- a/src/southbridge/amd/sb700/spi.c
+++ b/src/southbridge/amd/sb700/spi.c
@@ -118,8 +118,54 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
return 0;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c
index c58f402..3f2a33f 100644
--- a/src/southbridge/intel/common/spi.c
+++ b/src/southbridge/intel/common/spi.c
@@ -657,8 +657,54 @@ static int spi_ctrlr_xfer(const struct spi_slave *slave, const void *dout,
return 0;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c
index acdb072..2ea91e6 100644
--- a/src/southbridge/intel/fsp_rangeley/spi.c
+++ b/src/southbridge/intel/fsp_rangeley/spi.c
@@ -722,8 +722,54 @@ spi_xfer_exit:
return 0;
}
+static int spi_ctrlr_xfer_vector(const struct spi_slave *slave,
+ const struct spi_op vectors[], size_t count)
+{
+ size_t i = 0;
+ int ret;
+ const void *dout;
+ void *din;
+ size_t bytesout, bytesin;
+
+ while (i < count) {
+ /*
+ * Data to be sent will always be taken from the current
+ * vector.
+ */
+ dout = vectors[i].dout;
+ bytesout = vectors[i].bytesout;
+
+ /*
+ * Combine two concurrent vectors into one SPI xfer if:
+ * 1. There are atleast two vectors available.
+ * 2. Current vector has only dout non-NULL.
+ * 3. Next vector has only din non-NULL.
+ *
+ * If all the above conditions are satisfied, then the SPI flash
+ * controller can handle both command and response transactions
+ * concurrently. So, use din from next vector.
+ */
+ if (((i + 1) < count) &&
+ vectors[i].dout && !vectors[i].din &&
+ vectors[i+1].din && !vectors[i].dout) {
+ i++;
+ }
+
+ din = vectors[i].din;
+ bytesin = vectors[i].bytesin;
+
+ i++;
+
+ ret = spi_ctrlr_xfer(slave, dout, bytesout, din, bytesin);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
static const struct spi_ctrlr spi_ctrlr = {
- .xfer = spi_ctrlr_xfer,
+ .xfer_vector = spi_ctrlr_xfer_vector,
};
int spi_setup_slave(unsigned int bus, unsigned int cs, struct spi_slave *slave)
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