[coreboot-gerrit] Patch merged into coreboot/master: mainboard/intel/kblrvp: Enabling Kaby Lake RVP7
gerrit at coreboot.org
gerrit at coreboot.org
Sat Dec 3 02:34:57 CET 2016
the following patch was just integrated into master:
commit 2ed14f61d1a2976d0ebce59fcc67bd61fce4100d
Author: Barnali Sarkar <barnali.sarkar at intel.com>
Date: Tue Nov 29 16:51:08 2016 +0530
mainboard/intel/kblrvp: Enabling Kaby Lake RVP7
Add support for Kaby Lake RVP7 board
* Add RVP7 board support in Kconfig
* Override default descriptor and ME binary paths in Kconfig
since those binaries will differ for RVP3 and RVP7
* Add RVP7 board name in board_info.txt and Kconfig.name
* Add devicetree.cb for RVP7 in the variants path
* Add gpio.h for RVP7 in variants/include/variant path
* Made board specific code for retrieving spd, i.e., in RVP7
there is non-soldered DIMMs, so SPD is read through smbus,
unlike RVP3 where memory DIMMs are soldered down with board.
Hence for RVP3, the spd binaries will be fixed and can be
kept as binary file in cbfs.
BUG=none
BRANCH=none
TEST=Built and boot Kaby Lake RVP7
Change-Id: I6f3d17d857bad1b5cf39f0bc900c760fee72da48
Signed-off-by: Barnali Sarkar <barnali.sarkar at intel.com>
Reviewed-on: https://review.coreboot.org/17637
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
See https://review.coreboot.org/17637 for details.
-gerrit
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