[coreboot-gerrit] Patch set updated for coreboot: spi_flash: Move spi flash opcodes to spi_flash.h
Furquan Shaikh (furquan@google.com)
gerrit at coreboot.org
Fri Dec 2 18:03:26 CET 2016
Furquan Shaikh (furquan at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17680
-gerrit
commit 18f4578318170e2cd5f6f8f08bbe632d7a1d1d26
Author: Furquan Shaikh <furquan at chromium.org>
Date: Tue Nov 22 11:43:58 2016 -0800
spi_flash: Move spi flash opcodes to spi_flash.h
BUG=chrome-os-partner:59832
BRANCH=None
TEST=Compiles successfully
Change-Id: I3b6656923bb312de470da43a23f66f350e1cebc7
Signed-off-by: Furquan Shaikh <furquan at chromium.org>
---
src/include/spi-generic.h | 4 ----
src/include/spi_flash.h | 4 ++++
src/soc/intel/baytrail/spi.c | 1 +
src/soc/intel/braswell/spi.c | 1 +
src/soc/intel/broadwell/spi.c | 1 +
src/soc/intel/fsp_baytrail/spi.c | 1 +
src/southbridge/intel/fsp_rangeley/spi.c | 1 +
7 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/src/include/spi-generic.h b/src/include/spi-generic.h
index e57f56d..347ec3c 100644
--- a/src/include/spi-generic.h
+++ b/src/include/spi-generic.h
@@ -20,10 +20,6 @@
/* Controller-specific definitions: */
-/* SPI opcodes */
-#define SPI_OPCODE_WREN 0x06
-#define SPI_OPCODE_FAST_READ 0x0b
-
/*-----------------------------------------------------------------------
* Representation of a SPI slave, i.e. what we're communicating with.
*
diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h
index 70eef8e..8fec484 100644
--- a/src/include/spi_flash.h
+++ b/src/include/spi_flash.h
@@ -19,6 +19,10 @@
#include <stddef.h>
#include <boot/coreboot_tables.h>
+/* SPI Flash opcodes */
+#define SPI_OPCODE_WREN 0x06
+#define SPI_OPCODE_FAST_READ 0x0b
+
struct spi_flash {
struct spi_slave *spi;
const char *name;
diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c
index d651350..1f2b285 100644
--- a/src/soc/intel/baytrail/spi.c
+++ b/src/soc/intel/baytrail/spi.c
@@ -21,6 +21,7 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
+#include <spi_flash.h>
#include <spi-generic.h>
#include <soc/lpc.h>
diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c
index 97ca2e5..01f2150 100644
--- a/src/soc/intel/braswell/spi.c
+++ b/src/soc/intel/braswell/spi.c
@@ -22,6 +22,7 @@
#include <rules.h>
#include <soc/lpc.h>
#include <soc/pci_devs.h>
+#include <spi_flash.h>
#include <spi-generic.h>
#include <stdint.h>
#include <stdlib.h>
diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c
index e07b425..c7ac09c 100644
--- a/src/soc/intel/broadwell/spi.c
+++ b/src/soc/intel/broadwell/spi.c
@@ -20,6 +20,7 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
+#include <spi_flash.h>
#include <spi-generic.h>
#include <soc/pci_devs.h>
#include <soc/rcba.h>
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index b021175..1ab73f3 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -22,6 +22,7 @@
#include <arch/io.h>
#include <console/console.h>
#include <device/pci_ids.h>
+#include <spi_flash.h>
#include <spi-generic.h>
#include <soc/lpc.h>
diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c
index 007c612..8b0c3c1 100644
--- a/src/southbridge/intel/fsp_rangeley/spi.c
+++ b/src/southbridge/intel/fsp_rangeley/spi.c
@@ -22,6 +22,7 @@
#include <console/console.h>
#include <device/pci_ids.h>
+#include <spi_flash.h>
#include <spi-generic.h>
static int ich_status_poll(u16 bitmask, int wait_til_set);
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