[coreboot-gerrit] Patch merged into coreboot/master: driver/intel/fsp2.0: Add External stage cache region helper

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 4dfe13081922454e97e6b0f8d6532cd97c635b60
Author: Rizwan Qureshi <rizwan.qureshi at intel.com>
Date:   Wed Aug 24 16:05:32 2016 +0530

    driver/intel/fsp2.0: Add External stage cache region helper
    
    If ramstage caching outside CBMEM is enabled
    i.e CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM, then a
    helper function to determine the caching region in SMM
    should be implemented. Add the same to FSP2.0 driver.
    FSP1.1 driver had the same implementation hence copied stage_cache.c.
    
    The SoC code should implement the smm_subregion to provide
    the base and size of the caching region within SMM. The fsp/memmap.h
    provides the prototype and we will reuse the same from FPS 1.1.
    
    Change-Id: I4412a710391dc0cee044b96403c50260c3534e6f
    Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
    Reviewed-on: https://review.coreboot.org/16312
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Tested-by: build bot (Jenkins)


See https://review.coreboot.org/16312 for details.

-gerrit