[coreboot-gerrit] New patch to review for coreboot: fsp_broadwell_de: Refactor code for SPI debug messages

[Werner Zeh (werner.zeh@siemens.com)]

Werner Zeh (werner.zeh at siemens.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16347

-gerrit

commit 8649c4b9535d072743420e1a47a6420d349273cf
Author: Werner Zeh <werner.zeh at siemens.com>
Date:   Mon Aug 29 08:00:50 2016 +0200

    fsp_broadwell_de: Refactor code for SPI debug messages
    
    Currently boards based on fsp_broadwell_de fail to compile if the config
    switch CONFIG_DEBUG_SPI_FLASH is selected. The error is caused by the
    usage of const for the address pointer in the functions writeb_, writew_
    and writel_. The reason why it stayed hidden for so long is the fact that
    the switch is used with the preprocessor and nobody really selects it
    until there is a bug one want to find in this area.
    
    This patch fixes the parameter type definition which solves the error.
    In addition the config switch is not used on preprocessor level anymore
    but instead on compiler level. This ensures that at least the code
    syntax is checked on build time even if the config option is not
    selected.
    
    Change-Id: I3514b0d4c08bf5a4740f2632641e09af1b3aaf3a
    Signed-off-by: Werner Zeh <werner.zeh at siemens.com>
---
 src/soc/intel/fsp_broadwell_de/spi.c | 56 ++++++++++++++++++------------------
 1 file changed, 28 insertions(+), 28 deletions(-)

diff --git a/src/soc/intel/fsp_broadwell_de/spi.c b/src/soc/intel/fsp_broadwell_de/spi.c
index f98ab97..57f7951 100644
--- a/src/soc/intel/fsp_broadwell_de/spi.c
+++ b/src/soc/intel/fsp_broadwell_de/spi.c
@@ -1,6 +1,7 @@
 /*
  * Copyright (c) 2013 Google Inc.
  * Copyright (C) 2015-2016 Intel Corp.
+ * Copyright (C) 2016 Siemens AG
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
@@ -158,64 +159,63 @@ enum {
 	SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS =	3
 };
 
-#if IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)
-
 static u8 readb_(const void *addr)
 {
 	u8 v = read8(addr);
-	printk(BIOS_DEBUG, "read %2.2x from %4.4x\n",
-	       v, ((unsigned) addr & 0xffff) - 0xf020);
+	if (IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)) {
+		printk(BIOS_DEBUG, "SPI: read %2.2x from %4.4x\n",
+			v, ((unsigned) addr & 0xffff) - 0xf020);
+	}
 	return v;
 }
 
 static u16 readw_(const void *addr)
 {
 	u16 v = read16(addr);
-	printk(BIOS_DEBUG, "read %4.4x from %4.4x\n",
-	       v, ((unsigned) addr & 0xffff) - 0xf020);
+	if (IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)) {
+		printk(BIOS_DEBUG, "SPI: read %4.4x from %4.4x\n",
+			v, ((unsigned) addr & 0xffff) - 0xf020);
+	}
 	return v;
 }
 
 static u32 readl_(const void *addr)
 {
 	u32 v = read32(addr);
-	printk(BIOS_DEBUG, "read %8.8x from %4.4x\n",
-	       v, ((unsigned) addr & 0xffff) - 0xf020);
+	if (IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)) {
+		printk(BIOS_DEBUG, "SPI: read %8.8x from %4.4x\n",
+			v, ((unsigned) addr & 0xffff) - 0xf020);
+	}
 	return v;
 }
 
-static void writeb_(u8 b, const void *addr)
+static void writeb_(u8 b, void *addr)
 {
 	write8(addr, b);
-	printk(BIOS_DEBUG, "wrote %2.2x to %4.4x\n",
-	       b, ((unsigned) addr & 0xffff) - 0xf020);
+	if (IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)) {
+		printk(BIOS_DEBUG, "SPI: wrote %2.2x to %4.4x\n",
+			b, ((unsigned) addr & 0xffff) - 0xf020);
+	}
 }
 
-static void writew_(u16 b, const void *addr)
+static void writew_(u16 b, void *addr)
 {
 	write16(addr, b);
-	printk(BIOS_DEBUG, "wrote %4.4x to %4.4x\n",
-	       b, ((unsigned) addr & 0xffff) - 0xf020);
+	if (IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)) {
+		printk(BIOS_DEBUG, "SPI: wrote %4.4x to %4.4x\n",
+			b, ((unsigned) addr & 0xffff) - 0xf020);
+	}
 }
 
-static void writel_(u32 b, const void *addr)
+static void writel_(u32 b, void *addr)
 {
 	write32(addr, b);
-	printk(BIOS_DEBUG, "wrote %8.8x to %4.4x\n",
-	       b, ((unsigned) addr & 0xffff) - 0xf020);
+	if (IS_ENABLED(CONFIG_DEBUG_SPI_FLASH)) {
+		printk(BIOS_DEBUG, "SPI: wrote %8.8x to %4.4x\n",
+			b, ((unsigned) addr & 0xffff) - 0xf020);
+	}
 }
 
-#else /* CONFIG_DEBUG_SPI_FLASH ^^^ enabled  vvv NOT enabled */
-
-#define readb_(a) read8(a)
-#define readw_(a) read16(a)
-#define readl_(a) read32(a)
-#define writeb_(val, addr) write8(addr, val)
-#define writew_(val, addr) write16(addr, val)
-#define writel_(val, addr) write32(addr, val)
-
-#endif  /* CONFIG_DEBUG_SPI_FLASH ^^^ NOT enabled */
-
 static void write_reg(const void *value, void *dest, uint32_t size)
 {
 	const uint8_t *bvalue = value;