[coreboot-gerrit] Patch set updated for coreboot: intel/common: Clear wake status bits before sleep
Shaunak Saha (shaunak.saha@intel.com)
gerrit at coreboot.org
Tue Aug 23 19:03:35 CEST 2016
Shaunak Saha (shaunak.saha at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16299
-gerrit
commit c440a59c0675002a2e1e15200547800ee1198382
Author: Shaunak Saha <shaunak.saha at intel.com>
Date: Mon Aug 22 22:05:35 2016 -0700
intel/common: Clear wake status bits before sleep
Call power management utility function clear_wake_sts
from southbridge_smi_sleep before going to sleep.
This is needed to clear the wake status bits in ACPI
registers GPE0.
BUG=chrome-os-partner:55583
BRANCH=None
TEST=Verified that system goes to sleep on lidclose and
i powerd_dbus_suspend command issued from built-in
keyboard.
Change-Id: I204a59f8a19137d6a192ea2d89939eefcd5d41ce
Signed-off-by: Shaunak Saha <shaunak.saha at intel.com>
---
src/soc/intel/common/smihandler.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/common/smihandler.c b/src/soc/intel/common/smihandler.c
index e27752b..3bae30d 100644
--- a/src/soc/intel/common/smihandler.c
+++ b/src/soc/intel/common/smihandler.c
@@ -176,7 +176,8 @@ void southbridge_smi_sleep(const struct smm_save_state_ops *save_state_ops)
printk(BIOS_DEBUG, "SMI#: ERROR: SLP_TYP reserved\n");
break;
}
- /* Clear pending wake status bit to avoid immediate wake */
+ /* Clear set gpe status bit in ACPI registers */
+ clear_gpi_gpe_sts();
/* Tri-state specific GPIOS to avoid leakage during S3/S5 */
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