[coreboot-gerrit] Patch merged into coreboot/master: vboot/vbnv_flash: make I/O connection agnostic
gerrit at coreboot.org
gerrit at coreboot.org
Fri Aug 19 18:19:01 CEST 2016
the following patch was just integrated into master:
commit b18a6665df2633193b7863e3dd9eca230536405b
Author: Aaron Durbin <adurbin at chromium.org>
Date: Fri Aug 12 12:48:58 2016 -0500
vboot/vbnv_flash: make I/O connection agnostic
There's no need to be SPI specific w.r.t. how the flash is
connected. Therefore, use the RW boot device to write the
contents of VBNV. The erasable check was dropped because that
information isn't available. All regions should be aligned
accordingly on the platform for the underlying hardware
implementation. And once the VBNV region fills the erase
will fail.
BUG=chrome-os-partner:56151
Change-Id: I07fdc8613e0b3884e132a2f158ffeabeaa6da6ce
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: https://review.coreboot.org/16206
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan at google.com>
See https://review.coreboot.org/16206 for details.
-gerrit
More information about the coreboot-gerrit
mailing list