[coreboot-gerrit] New patch to review for coreboot: Revert "soc/intel/apollolake: work around FSP for gpio interrupt polarity"
Andrey Petrov (andrey.petrov@intel.com)
gerrit at coreboot.org
Thu Aug 18 23:04:27 CEST 2016
Andrey Petrov (andrey.petrov at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16250
-gerrit
commit 0475a221212fc3ff20a7968499801b9b089fe618
Author: Andrey Petrov <andrey.petrov at intel.com>
Date: Thu Aug 18 13:58:22 2016 -0700
Revert "soc/intel/apollolake: work around FSP for gpio interrupt polarity"
This reverts commit 81d1e09113bc12ea9427e9522d4f5eab982c145e. Since the
problem has been addressed in FSP the workaround is no longer needed.
BUG=chrome-os-partner:54955
TEST=build only
Change-Id: I96220177ce2862b626d44bcb40da198b8ed43714
Signed-off-by: Andrey Petrov <andrey.petrov at intel.com>
---
src/soc/intel/apollolake/chip.c | 8 ---
src/soc/intel/apollolake/include/soc/itss.h | 7 ---
src/soc/intel/apollolake/itss.c | 86 -----------------------------
3 files changed, 101 deletions(-)
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 1b109d0..5355a1d 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -28,7 +28,6 @@
#include <soc/iomap.h>
#include <soc/cpu.h>
#include <soc/intel/common/vbt.h>
-#include <soc/itss.h>
#include <soc/nvs.h>
#include <soc/pci_devs.h>
#include <spi-generic.h>
@@ -196,15 +195,8 @@ static void soc_init(void *data)
/* Save VBT info and mapping */
vbt = vbt_get(&vbt_rdev);
- /* Snapshot the current GPIO IRQ polarities. FSP is setting a
- * default policy that doesn't honor boards' requirements. */
- itss_snapshot_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END);
-
fsp_silicon_init();
- /* Restore GPIO IRQ polarities back to previous settings. */
- itss_restore_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END);
-
/* override 'enabled' setting in device tree if needed */
pcie_override_devicetree_after_silicon_init();
diff --git a/src/soc/intel/apollolake/include/soc/itss.h b/src/soc/intel/apollolake/include/soc/itss.h
index 2f47ec6..1de7226 100644
--- a/src/soc/intel/apollolake/include/soc/itss.h
+++ b/src/soc/intel/apollolake/include/soc/itss.h
@@ -16,14 +16,7 @@
#ifndef _SOC_APOLLOLAKE_ITSS_H_
#define _SOC_APOLLOLAKE_ITSS_H_
-#define GPIO_IRQ_START 50
-#define GPIO_IRQ_END 119
-
/* Set the interrupt polarity for provided IRQ to the APIC. */
void itss_set_irq_polarity(int irq, int active_low);
-/* Snapshot and restore IRQ polarity settings for the inclusive range. */
-void itss_snapshot_irq_polarities(int start, int end);
-void itss_restore_irq_polarities(int start, int end);
-
#endif /* _SOC_APOLLOLAKE_ITSS_H_ */
diff --git a/src/soc/intel/apollolake/itss.c b/src/soc/intel/apollolake/itss.c
index 9c49d6c..60d3e06 100644
--- a/src/soc/intel/apollolake/itss.c
+++ b/src/soc/intel/apollolake/itss.c
@@ -13,8 +13,6 @@
* GNU General Public License for more details.
*/
-#include <commonlib/helpers.h>
-#include <console/console.h>
#include <stdint.h>
#include <soc/iosf.h>
#include <soc/itss.h>
@@ -23,7 +21,6 @@
#define ITSS_MAX_IRQ 119
#define IPC0 0x3200
#define IRQS_PER_IPC 32
-#define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC)
void itss_set_irq_polarity(int irq, int active_low)
{
@@ -44,86 +41,3 @@ void itss_set_irq_polarity(int irq, int active_low)
val |= active_low ? mask : 0;
iosf_write(port, reg, val);
}
-
-static uint32_t irq_snapshot[NUM_IPC_REGS];
-
-void itss_snapshot_irq_polarities(int start, int end)
-{
- int i;
- int reg_start;
- int reg_end;
- const uint16_t port = IOSF_ITSS_PORT_ID;
-
- if (start < 0 || start > ITSS_MAX_IRQ ||
- end < 0 || end > ITSS_MAX_IRQ || end < start)
- return;
-
- reg_start = start / IRQS_PER_IPC;
- reg_end = (end + IRQS_PER_IPC - 1) / IRQS_PER_IPC;
-
- for (i = reg_start; i < reg_end; i++) {
- uint16_t reg = IPC0 + sizeof(uint32_t) * i;
- irq_snapshot[i] = iosf_read(port, reg);
- }
-}
-
-static void show_irq_polarities(const char *msg)
-{
- int i;
- const uint16_t port = IOSF_ITSS_PORT_ID;
-
- printk(BIOS_INFO, "ITSS IRQ Polarities %s:\n", msg);
- for (i = 0; i < NUM_IPC_REGS; i++) {
- uint16_t reg = IPC0 + sizeof(uint32_t) * i;
- printk(BIOS_INFO, "IPC%d: 0x%08x\n", i, iosf_read(port, reg));
- }
-}
-
-void itss_restore_irq_polarities(int start, int end)
-{
- int i;
- int reg_start;
- int reg_end;
- const uint16_t port = IOSF_ITSS_PORT_ID;
-
- if (start < 0 || start > ITSS_MAX_IRQ ||
- end < 0 || end > ITSS_MAX_IRQ || end < start)
- return;
-
- show_irq_polarities("Before");
-
- reg_start = start / IRQS_PER_IPC;
- reg_end = (end + IRQS_PER_IPC - 1) / IRQS_PER_IPC;
-
- for (i = reg_start; i < reg_end; i++) {
- uint32_t mask;
- uint32_t val;
- uint16_t reg;
- int irq_start;
- int irq_end;
-
- irq_start = i * IRQS_PER_IPC;
- irq_end = MIN(irq_start + IRQS_PER_IPC - 1, ITSS_MAX_IRQ);
-
- if (start > irq_end)
- continue;
- if (end < irq_start)
- break;
-
- /* Track bits within the bounds of of the register. */
- irq_start = MAX(start, irq_start) % IRQS_PER_IPC;
- irq_end = MIN(end, irq_end) % IRQS_PER_IPC;
-
- /* Create bitmask of the inclusive range of start and end. */
- mask = (((1U << irq_end) - 1) | (1U << irq_end));
- mask &= ~((1U << irq_start) - 1);
-
- reg = IPC0 + sizeof(uint32_t) * i;
- val = iosf_read(port, reg);
- val &= ~mask;
- val |= mask & irq_snapshot[i];
- iosf_write(port, reg, val);
- }
-
- show_irq_polarities("After");
-}
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