[coreboot-gerrit] New patch to review for coreboot: Kconfig: separate memory mapped boot device from SPI
Aaron Durbin (adurbin@chromium.org)
gerrit at coreboot.org
Mon Aug 15 21:26:55 CEST 2016
Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16228
-gerrit
commit c51857e34b13b099a103ff5956b8180b664d488d
Author: Aaron Durbin <adurbin at chromium.org>
Date: Thu Aug 11 14:04:10 2016 -0500
Kconfig: separate memory mapped boot device from SPI
Make the indication of the boot device being memory mapped
separate from SPI. However, retain the same defaults that
previously existed.
BUG=chrome-os-partner:56151
Change-Id: I06f138078c47a1e4b4b3edbdbf662f171e11c9d4
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/Kconfig | 7 +++++++
src/drivers/elog/elog.c | 4 ++--
src/drivers/spi/Kconfig | 7 -------
src/lib/cbfs.c | 2 +-
src/soc/intel/apollolake/romstage.c | 3 ++-
5 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig
index 04b8d24..f7a924f 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -483,6 +483,13 @@ config BOOT_DEVICE_SPI_FLASH
default y if !BOOT_DEVICE_NOT_SPI_FLASH
default n
+config BOOT_DEVICE_MEMORY_MAPPED
+ bool
+ default y if ARCH_X86 && BOOT_DEVICE_SPI_FLASH
+ default n
+ help
+ Inform system if SPI is memory-mapped or not.
+
config RTC
bool
default n
diff --git a/src/drivers/elog/elog.c b/src/drivers/elog/elog.c
index 0b7dee3..3d8c85c8 100644
--- a/src/drivers/elog/elog.c
+++ b/src/drivers/elog/elog.c
@@ -586,8 +586,8 @@ static int elog_shrink(void)
*/
static inline u8 *elog_flash_offset_to_address(void)
{
- /* Only support memory-mapped SPI devices. */
- if (!IS_ENABLED(CONFIG_SPI_FLASH_MEMORY_MAPPED))
+ /* Only support memory-mapped devices. */
+ if (!IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED))
return NULL;
if (!elog_spi)
diff --git a/src/drivers/spi/Kconfig b/src/drivers/spi/Kconfig
index ee48d67..b0187fd 100644
--- a/src/drivers/spi/Kconfig
+++ b/src/drivers/spi/Kconfig
@@ -45,13 +45,6 @@ config SPI_ATOMIC_SEQUENCING
in the SPI controller. Hardware manages the transaction instead of
software. This is common on x86 platforms.
-config SPI_FLASH_MEMORY_MAPPED
- bool
- default y if ARCH_X86
- default n if !ARCH_X86
- help
- Inform system if SPI is memory-mapped or not.
-
config SPI_FLASH_SMM
bool "SPI flash driver support in SMM"
default n
diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c
index 7a0f187..7318c87 100644
--- a/src/lib/cbfs.c
+++ b/src/lib/cbfs.c
@@ -193,7 +193,7 @@ int cbfs_prog_stage_load(struct prog *pstage)
/* Hacky way to not load programs over read only media. The stages
* that would hit this path initialize themselves. */
if (ENV_VERSTAGE && !IS_ENABLED(CONFIG_NO_XIP_EARLY_STAGES) &&
- IS_ENABLED(CONFIG_SPI_FLASH_MEMORY_MAPPED)) {
+ IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)) {
void *mapping = rdev_mmap(fh, foffset, fsize);
rdev_munmap(fh, mapping);
if (mapping == load)
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 8f17fdd..067d654 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -160,7 +160,8 @@ void platform_fsp_memory_init_params_cb(struct FSPM_UPD *mupd)
* state machine transition to next boot state, so that it can function
* as designed.
*/
- mupd->FspmConfig.SkipCseRbp = IS_ENABLED(CONFIG_SPI_FLASH_MEMORY_MAPPED);
+ mupd->FspmConfig.SkipCseRbp =
+ IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED);
}
__attribute__ ((weak))
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