[coreboot-gerrit] Patch set updated for coreboot: arch/riscv: Set the stack pointer upon trap entry
Jonathan Neuschäfer (j.neuschaefer@gmx.net)
gerrit at coreboot.org
Fri Aug 12 01:46:48 CEST 2016
Jonathan Neuschäfer (j.neuschaefer at gmx.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16017
-gerrit
commit 055eac2250677c2e48fea78161190ae7278b5948
Author: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Date: Thu Aug 11 22:49:10 2016 +0200
arch/riscv: Set the stack pointer upon trap entry
Change-Id: I52fae62bc6cf775179963720fbcfaa9e07f6a717
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
---
src/arch/riscv/trap_util.S | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/src/arch/riscv/trap_util.S b/src/arch/riscv/trap_util.S
index 82a5629..5ee0fdd 100644
--- a/src/arch/riscv/trap_util.S
+++ b/src/arch/riscv/trap_util.S
@@ -116,7 +116,17 @@ supervisor_trap_entry:
.global trap_entry
trap_entry:
csrw mscratch, sp
- 1:addi sp,sp,-320
+
+ # SMP isn't supported yet, to avoid overwriting the same stack with different
+ # harts that handle traps at the same time.
+ csrr sp, mhartid
+.Lsmp_hang:
+ bnez sp, .Lsmp_hang
+
+ # TODO: Use the old stack pointer (plus an offset) for exceptions in machine
+ # mode, to avoid overwriting stack data.
+ li sp, 0x8000fff0
+
save_tf
move a0,sp
jal trap_handler
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