[coreboot-gerrit] Patch merged into coreboot/master: skylake/devicetree: Add PIRQ Routing programming

gerrit at coreboot.org gerrit at coreboot.org
Mon Aug 8 18:24:10 CEST 2016


the following patch was just integrated into master:
commit 8f2f22d25806a4547be1a1a125f153bb4b0fe581
Author: Barnali Sarkar <barnali.sarkar at intel.com>
Date:   Wed Aug 3 12:15:22 2016 +0530

    skylake/devicetree: Add PIRQ Routing programming
    
    Program PIRQ Routing with correct values, as done by FSP, and also in
    'soc/intel/skylake/romstage/pch.c' file. If not done, these values get
    overridden by "0" during PxRC -> PIRQ programming in ramstage, in
    'soc/intel/skylake/lpc.c' file pch_pirq_init()function.
    
    BUG=none
    BRANCH=none
    TEST=Build and boot kunimitsu
    
    Change-Id: Ibeb9a64824a71c253e45d6a1c6088abd737cf046
    Signed-off-by: Barnali Sarkar <barnali.sarkar at intel.com>
    Reviewed-on: https://review.coreboot.org/16044
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-by: Subrata Banik <subrata.banik at intel.com>


See https://review.coreboot.org/16044 for details.

-gerrit



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