[coreboot-gerrit] New patch to review for coreboot: buildgcc: Use upstream patch for aarch64 build issue

[Paul Kocialkowski (contact@paulk.fr)]

Paul Kocialkowski (contact at paulk.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16110

-gerrit

commit 3f9c337e0eed95d8c8147f7fe336c4c84637a406
Author: Paul Kocialkowski <contact at paulk.fr>
Date:   Sun Aug 7 11:42:01 2016 +0200

    buildgcc: Use upstream patch for aarch64 build issue
    
    Upstream proposed and merged a patch fixing the ARM Trusted Firmware
    build issue that occurs with recent version sof binutils. This includes
    this patch instead of the previous one.
    
    See binutils commit 7ea12e5c3ad54da440c08f32da09534e63e515ca:
    "Fix the generation of alignment frags in code sections for AArch64."
    
    The issue was reported at:
    https://sourceware.org/bugzilla/show_bug.cgi?id=20364
    
    Change-Id: I16a8043d3562107b8e84e93d3f3d768d26dac7e4
    Signed-off-by: Paul Kocialkowski <contact at paulk.fr>
---
 util/crossgcc/patches/binutils-2.26.1_aarch.patch | 123 ++++++++++++++++------
 1 file changed, 92 insertions(+), 31 deletions(-)

diff --git a/util/crossgcc/patches/binutils-2.26.1_aarch.patch b/util/crossgcc/patches/binutils-2.26.1_aarch.patch
index 78934d4..1e709d1 100644
--- a/util/crossgcc/patches/binutils-2.26.1_aarch.patch
+++ b/util/crossgcc/patches/binutils-2.26.1_aarch.patch
@@ -1,32 +1,93 @@
-diff -Naur binutils-2.26.1/gas/config/tc-aarch64.c binutils-2.26.1/gas/config/tc-aarch64.c
---- binutils-2.26.1/gas/config/tc-aarch64.c	2016-01-25 01:51:06.000000000 -0700
-+++ binutils-2.26.1/gas/config/tc-aarch64.c	2016-07-14 10:05:37.667935255 -0600
-@@ -1857,12 +1857,7 @@
-       return;
-     }
-
--  /* Sections are assumed to start aligned. In executable section, there is no
--     MAP_DATA symbol pending. So we only align the address during
--     MAP_DATA --> MAP_INSN transition.
--     For other sections, this is not guaranteed.  */
--  enum mstate mapstate = seg_info (now_seg)->tc_segment_info_data.mapstate;
--  if (!need_pass_2 && subseg_text_p (now_seg) && mapstate == MAP_DATA)
-+  if (!need_pass_2)
-     frag_align_code (2, 0);
-
- #ifdef OBJ_ELF
-@@ -6040,14 +6035,6 @@
-
-   init_operand_error_report ();
-
--  /* Sections are assumed to start aligned. In executable section, there is no
--     MAP_DATA symbol pending. So we only align the address during
--     MAP_DATA --> MAP_INSN transition.
--     For other sections, this is not guaranteed.  */
--  enum mstate mapstate = seg_info (now_seg)->tc_segment_info_data.mapstate;
--  if (!need_pass_2 && subseg_text_p (now_seg) && mapstate == MAP_DATA)
--    frag_align_code (2, 0);
+diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
+index 2d491f6..e221ef4 100644
+--- a/gas/config/tc-aarch64.c
++++ b/gas/config/tc-aarch64.c
+@@ -1736,13 +1736,13 @@ s_ltorg (int ignored ATTRIBUTE_UNUSED)
+       if (pool == NULL || pool->symbol == NULL || pool->next_free_entry == 0)
+ 	continue;
+ 
+-      mapping_state (MAP_DATA);
 -
-   saved_cond = inst.cond;
-   reset_aarch64_instruction (&inst);
-   inst.cond = saved_cond;
+       /* Align pool as you have word accesses.
+          Only make a frag if we have to.  */
+       if (!need_pass_2)
+ 	frag_align (align, 0, 0);
+ 
++      mapping_state (MAP_DATA);
++
+       record_alignment (now_seg, align);
+ 
+       sprintf (sym_name, "$$lit_\002%x", pool->id);
+@@ -6373,11 +6373,15 @@ aarch64_init_frag (fragS * fragP, int max_chars)
+ 
+   switch (fragP->fr_type)
+     {
+-    case rs_align:
+     case rs_align_test:
+     case rs_fill:
+       mapping_state_2 (MAP_DATA, max_chars);
+       break;
++    case rs_align:
++      /* PR 20364: We can get alignment frags in code sections,
++	 so do not just assume that we should use the MAP_DATA state.  */
++      mapping_state_2 (subseg_text_p (now_seg) ? MAP_INSN : MAP_DATA, max_chars);
++      break;
+     case rs_align_code:
+       mapping_state_2 (MAP_INSN, max_chars);
+       break;
+diff --git a/gas/testsuite/gas/aarch64/pr20364.d b/gas/testsuite/gas/aarch64/pr20364.d
+new file mode 100644
+index 0000000..babcff1
+--- /dev/null
++++ b/gas/testsuite/gas/aarch64/pr20364.d
+@@ -0,0 +1,13 @@
++# Check that ".align <size>, <fill>" does not set the mapping state to DATA, causing unnecessary frag generation.
++#name: PR20364 
++#objdump: -d
++
++.*:     file format .*
++
++Disassembly of section \.vectors:
++
++0+000 <.*>:
++   0:	d2800000 	mov	x0, #0x0                   	// #0
++   4:	94000000 	bl	0 <plat_report_exception>
++   8:	17fffffe 	b	0 <bl1_exceptions>
++
+diff --git a/gas/testsuite/gas/aarch64/pr20364.s b/gas/testsuite/gas/aarch64/pr20364.s
+new file mode 100644
+index 0000000..594ad7c
+--- /dev/null
++++ b/gas/testsuite/gas/aarch64/pr20364.s
+@@ -0,0 +1,28 @@
++ .macro vector_base label
++ .section .vectors, "ax"
++ .align 11, 0
++ \label:
++ .endm
++
++ .macro vector_entry label
++ .section .vectors, "ax"
++ .align 7, 0
++ \label:
++ .endm
++
++ .macro check_vector_size since
++   .if (. - \since) > (32 * 4)
++     .error "Vector exceeds 32 instructions"
++   .endif
++ .endm
++
++ .globl bl1_exceptions
++
++vector_base bl1_exceptions
++
++vector_entry SynchronousExceptionSP0
++ mov x0, #0x0
++ bl plat_report_exception
++ b SynchronousExceptionSP0
++ check_vector_size SynchronousExceptionSP0
++
+-- 
+1.7.1
+