[coreboot-gerrit] Patch set updated for coreboot: Add stub implementation of MVMAP2315 SOC
hakim giydan (hgiydan@marvell.com)
gerrit at coreboot.org
Fri Aug 5 19:48:22 CEST 2016
hakim giydan (hgiydan at marvell.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15506
-gerrit
commit bf9c052ffd0021cabd19cb5e5e42ca7f12dda7e7
Author: Hakim Giydan <hgiydan at marvell.com>
Date: Fri Aug 5 10:47:23 2016 -0700
Add stub implementation of MVMAP2315 SOC
Most things still need to be filled in, but this will allow
us to build boards which use this SOC.
Nvidia Tegra210 SOC and Rochchip Rk3399 SOC has been used
as templates to create this directory.
Change-Id: I8cc3e99df915bb289a2f3539db103cd6be90a0b2
Signed-off-by: Hakim Giydan <hgiydan at marvell.com>
---
src/soc/marvell/mvmap2315/Kconfig | 52 +++
src/soc/marvell/mvmap2315/Makefile.inc | 55 ++++
src/soc/marvell/mvmap2315/bootblock.c | 40 +++
src/soc/marvell/mvmap2315/cbmem.c | 29 ++
src/soc/marvell/mvmap2315/clock.c | 33 ++
src/soc/marvell/mvmap2315/include/soc/addressmap.h | 35 ++
src/soc/marvell/mvmap2315/include/soc/clock.h | 357 +++++++++++++++++++++
src/soc/marvell/mvmap2315/include/soc/memlayout.ld | 55 ++++
.../marvell/mvmap2315/include/soc/mmu_operations.h | 25 ++
src/soc/marvell/mvmap2315/include/soc/pinmux.h | 85 +++++
src/soc/marvell/mvmap2315/include/soc/reset.h | 20 ++
src/soc/marvell/mvmap2315/include/soc/sdram.h | 20 ++
src/soc/marvell/mvmap2315/include/soc/timer.h | 47 +++
src/soc/marvell/mvmap2315/include/soc/uart.h | 21 ++
src/soc/marvell/mvmap2315/media.c | 30 ++
src/soc/marvell/mvmap2315/mmu_operations.c | 48 +++
src/soc/marvell/mvmap2315/pinmux.c | 64 ++++
src/soc/marvell/mvmap2315/reset.c | 28 ++
src/soc/marvell/mvmap2315/romstage.c | 45 +++
src/soc/marvell/mvmap2315/romstage_entry.S | 23 ++
src/soc/marvell/mvmap2315/sdram.c | 25 ++
src/soc/marvell/mvmap2315/soc.c | 42 +++
src/soc/marvell/mvmap2315/timer.c | 63 ++++
src/soc/marvell/mvmap2315/uart.c | 49 +++
24 files changed, 1291 insertions(+)
diff --git a/src/soc/marvell/mvmap2315/Kconfig b/src/soc/marvell/mvmap2315/Kconfig
new file mode 100644
index 0000000..d27f4c4
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/Kconfig
@@ -0,0 +1,52 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Marvell, Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+config SOC_MARVELL_MVMAP2315
+ bool
+ default n
+ select ARCH_BOOTBLOCK_ARMV7_R
+ select ARCH_RAMSTAGE_ARMV8_64
+ select ARCH_ROMSTAGE_ARMV8_64
+ select ARCH_VERSTAGE_ARMV8_64
+ select BOOTBLOCK_CONSOLE
+ select COLLECT_TIMESTAMPS
+ select DRIVERS_UART_8250MEM_32
+ select HAVE_HARD_RESET
+ select HAVE_MONOTONIC_TIMER
+ select GENERIC_UDELAY
+ select UNCOMPRESSED_RAMSTAGE
+ select UART_OVERRIDE_REFCLK
+
+if SOC_MARVELL_MVMAP2315
+
+config CHROMEOS
+ select VBOOT
+ select VBOOT_DYNAMIC_WORK_BUFFER
+ select VBOOT_STARTS_IN_ROMSTAGE
+
+config CONSOLE_SERIAL_MVMAP2315_UART_ADDRESS
+ hex
+ depends on CONSOLE_SERIAL
+ default 0xE1060000
+ help
+ Map the UART to the respective MMIO address
+
+config TTYS0_BAUD
+ int
+ depends on CONSOLE_SERIAL
+ default 9600
+ help
+ Baud rate for the UART
+endif
diff --git a/src/soc/marvell/mvmap2315/Makefile.inc b/src/soc/marvell/mvmap2315/Makefile.inc
new file mode 100644
index 0000000..d412886
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/Makefile.inc
@@ -0,0 +1,55 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2016 Marvell, Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+
+ifeq ($(CONFIG_SOC_MARVELL_MVMAP2315),y)
+
+bootblock-y += bootblock.c
+bootblock-y += clock.c
+bootblock-y += media.c
+bootblock-y += pinmux.c
+bootblock-y += reset.c
+bootblock-y += timer.c
+bootblock-y += sdram.c
+bootblock-y += uart.c
+
+ramstage-y += cbmem.c
+ramstage-y += media.c
+ramstage-y += reset.c
+ramstage-y += soc.c
+ramstage-y += timer.c
+ramstage-y += sdram.c
+ramstage-y += uart.c
+
+romstage-y += cbmem.c
+romstage-y += clock.c
+romstage-y += media.c
+romstage-y += mmu_operations.c
+romstage-y += reset.c
+romstage-y += romstage_entry.S
+romstage-y += romstage.c
+romstage-y += sdram.c
+romstage-y += timer.c
+romstage-y += uart.c
+
+CPPFLAGS_common += -Isrc/soc/marvell/mvmap2315/include/
+
+all: $(objcbfs)/romstage.bin
+
+## generating romtage.bin since it is required to create the BDB
+
+$(objcbfs)/romstage.bin: $(objcbfs)/romstage.elf
+ $(OBJCOPY_romstage) -O binary $(objcbfs)/romstage.elf $(objcbfs)/romstage.bin
+
+endif
diff --git a/src/soc/marvell/mvmap2315/bootblock.c b/src/soc/marvell/mvmap2315/bootblock.c
new file mode 100644
index 0000000..f7eafec
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/bootblock.c
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <bootblock_common.h>
+#include <console/console.h>
+#include <timestamp.h>
+#include <console/uart.h>
+#include <soc/uart.h>
+
+void bootblock_soc_early_init(void)
+{
+ timestamp_add_now(TS_START_BOOTBLOCK);
+ uart_num = 0;
+}
+
+void bootblock_soc_init(void)
+{
+ /* initializing UART1 to free UART0 to be used by romstage */
+ uart_num = 1;
+ uart_init(uart_num);
+
+ while (1)
+ ;
+}
diff --git a/src/soc/marvell/mvmap2315/cbmem.c b/src/soc/marvell/mvmap2315/cbmem.c
new file mode 100644
index 0000000..8735526
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/cbmem.c
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <cbmem.h>
+#include <soc/addressmap.h>
+#include <soc/sdram.h>
+#include <symbols.h>
+
+void *cbmem_top(void)
+{
+ return (void *)min((uintptr_t)_dram + sdram_size_mb() * MiB,
+ MAX_DRAM_ADDRESS);
+}
diff --git a/src/soc/marvell/mvmap2315/clock.c b/src/soc/marvell/mvmap2315/clock.c
new file mode 100644
index 0000000..ef0c3c5
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/clock.c
@@ -0,0 +1,33 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <arch/clock.h>
+#include <arch/io.h>
+#include <soc/clock.h>
+
+void clock_init(void)
+{
+ u32 freq = MVMAP2315_CLK_M_KHZ * 1000;
+
+ set_cntfrq(freq);
+
+ write32(&mvmap2315_gentimer->cntfid0, freq);
+
+ setbits_le32(&mvmap2315_gentimer->cntcr, MVMAP2315_GENTIMER_EN);
+}
diff --git a/src/soc/marvell/mvmap2315/include/soc/addressmap.h b/src/soc/marvell/mvmap2315/include/soc/addressmap.h
new file mode 100644
index 0000000..96592b1
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/addressmap.h
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MARVELL_MVMAP2315_ADDRESS_MAP_H__
+#define __SOC_MARVELL_MVMAP2315_ADDRESS_MAP_H__
+
+#define MAX_DRAM_ADDRESS 0x73000000
+
+#define MVMAP2315_CBFS_BASE 0x00400000
+
+#define MVMAP2315_PINMUX_BASE 0xE0140000
+#define MVMAP2315_TIMER0_BASE 0xE1020000
+
+#define MVMAP2315_MAIN_PLL_BASE 0xE0125000
+#define MVMAP2315_APMU_CLK_BASE 0xE0125400
+#define MVMAP2315_GENTIMER_BASE 0xE0137000
+#define MVMAP2315_MPMU_CLK_BASE 0xEF000800
+
+#define MVMAP2315_RAM_BASE 0x00000000
+#define MVMAP2315_DEVICE_BASE 0x80000000
+#define MVMAP2315_FLASH_BASE 0xFE000000
+
+#endif /* __SOC_MARVELL_MVMAP2315_ADDRESS_MAP_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/clock.h b/src/soc/marvell/mvmap2315/include/soc/clock.h
new file mode 100644
index 0000000..1045ab6
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/clock.h
@@ -0,0 +1,357 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software;
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation;
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY;
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MARVELL_MVMAP2315_CLOCK_H__
+#define __SOC_MARVELL_MVMAP2315_CLOCK_H__
+
+#include <soc/addressmap.h>
+#include <types.h>
+
+#define MVMAP2315_CLK_M_KHZ 25000
+#define MVMAP2315_GENTIMER_EN BIT(0)
+
+struct mvmap2315_gentimer_regs {
+ u32 cntcr;
+ u32 cntsr;
+ u32 cntcvl;
+ u32 cntcvu;
+ u8 _reserved0[0x10];
+ u32 cntfid0;
+ u8 _reserved1[0xfac];
+ u32 pidr4;
+ u8 _reserved2[0x0c];
+ u32 pidr0;
+ u32 pidr1;
+ u32 pidr2;
+ u32 pidr3;
+ u32 cidr0;
+ u32 cidr1;
+ u32 cidr2;
+ u32 cidr3;
+};
+
+check_member(mvmap2315_gentimer_regs, cidr3, 0xFFC);
+static struct mvmap2315_gentimer_regs * const mvmap2315_gentimer
+ = (void *)MVMAP2315_GENTIMER_BASE;
+
+#define MVMAP2315_PLL_LOCK BIT(0)
+#define MVMAP2315_PLL_BYPASS_EN BIT(16)
+
+struct mvmap2315_main_pll_regs {
+ u32 rst_prediv;
+ u32 mult_postdiv;
+ u32 kvco;
+ u32 misc;
+ u32 feedback_mode_deskew;
+ u32 offset_mode;
+ u32 fixed_mode_ssc_mode;
+ u32 ssc_freq_ssc_range;
+ u32 clk_ctrl_marvell_test;
+ u32 lock_status;
+ u32 reserve_out;
+};
+
+check_member(mvmap2315_main_pll_regs, reserve_out, 0x28);
+static struct mvmap2315_main_pll_regs * const mvmap2315_pll
+ = (void *)MVMAP2315_MAIN_PLL_BASE;
+
+#define MVMAP2315_UART_CLK_EN BIT(1)
+#define MVMAP2315_SDMMC_CLK_RSTN BIT(0)
+#define MVMAP2315_APMU_CLK_EN BIT(1)
+#define MVMAP2315_APMU_CLK_RSTN BIT(0)
+struct mvmap2315_apmu_clk_regs {
+ u32 uartfracdivcfg0;
+ u8 _reserved0[0x0c];
+ u32 uartfracdivcfg1;
+ u8 _reserved1[0x0c];
+ u32 r4clkstatus;
+ u8 _reserved2[0x5c];
+ u32 busclk2x_a2_clkgenconfig;
+ u32 busclk2x_a2_clkgenstatus;
+ u8 _reserved3[0x08];
+ u32 busclk_mcix2_clkgenconfig;
+ u32 busclk_mcix2_clkgenstatus;
+ u32 busclk_mcix2_phyreset_clkgenconfig;
+ u32 busclk_mcix2_phyreset_clkgenstatus;
+ u32 busclk_mcix10_clkgenconfig;
+ u32 busclk_mcix10_clkgenstatus;
+ u32 busclk_mcix1_phyreset0_clkgenconfig;
+ u32 busclk_mcix1_phyreset0_clkgenstatus;
+ u32 busclk_mcix11_clkgenconfig;
+ u32 busclk_mcix11_clkgenstatus;
+ u32 busclk_mcix1_phyreset1_clkgenconfig;
+ u32 busclk_mcix1_phyreset1_clkgenstatus;
+ u32 busclk_mcix12_clkgenconfig;
+ u32 busclk_mcix12_clkgenstatus;
+ u32 busclk_mcix1_phyreset2_clkgenconfig;
+ u32 busclk_mcix1_phyreset2_clkgenstatus;
+ u32 busclk_mcix13_clkgenconfig;
+ u32 busclk_mcix13_clkgenstatus;
+ u32 busclk_mcix1_phyreset3_clkgenconfig;
+ u32 busclk_mcix1_phyreset3_clkgenstatus;
+ u8 _reserved4[0x10];
+ u32 busclk_aes_clkgenconfig;
+ u32 busclk_aes_clkgenstatus;
+ u32 busclk_apaonbus_hs_clkgenconfig;
+ u32 busclk_apaonbus_hs_clkgenstatus;
+ u32 busclk_a2_clkgenconfig;
+ u32 busclk_a2_clkgenstatus;
+ u8 _reserved5[0x78];
+ u32 apaonclk_clkgenconfig;
+ u32 apaonclk_clkgenstatus;
+ u32 apaonclk_apmucpu_clkgenconfig;
+ u32 apaonclk_apmucpu_clkgenstatus;
+ u32 apaonclk_sdmmc_clkgenconfig;
+ u32 apaonclk_sdmmc_clkgenstatus;
+ u8 _reserved6[0x08];
+ u32 apaonclk_m2m_clkgenconfig;
+ u32 apaonclk_m2m_clkgenstatus;
+ u32 apaonclk_apb_clkgenconfig;
+ u32 apaonclk_apb_clkgenstatus;
+ u8 _reserved7[0x50];
+ u32 bistclk_clkgenconfig;
+ u32 bistclk_clkgenstatus;
+ u32 bistclk_a2reset_clkgenconfig;
+ u32 bistclk_a2reset_clkgenstatus;
+ u32 bistclk_apcpureset_clkgenconfig;
+ u32 bistclk_apcpureset_clkgenstatus;
+ u32 bistclk_coresightreset_clkgenconfig;
+ u32 bistclk_coresightreset_clkgenstatus;
+ u32 bistclk_mcflcreset_clkgenconfig;
+ u32 bistclk_mcflcreset_clkgenstatus;
+ u8 _reserved8[0x08];
+ u32 bistclk_gpu3dreset_clkgenconfig;
+ u32 bistclk_gpu3dreset_clkgenstatus;
+ u32 bistclk_gpu3dcorereset0_clkgenconfig;
+ u32 bistclk_gpu3dcorereset0_clkgenstatus;
+ u32 bistclk_gpu3dcorereset1_clkgenconfig;
+ u32 bistclk_gpu3dcorereset1_clkgenstatus;
+ u32 bistclk_gpu3dcorereset2_clkgenconfig;
+ u32 bistclk_gpu3dcorereset2_clkgenstatus;
+ u32 bistclk_gpu3dcorereset3_clkgenconfig;
+ u32 bistclk_gpu3dcorereset3_clkgenstatus;
+ u32 bistclk_gpu2dreset_clkgenconfig;
+ u32 bistclk_gpu2dreset_clkgenstatus;
+ u32 bistclk_zramreset_clkgenconfig;
+ u32 bistclk_zramreset_clkgenstatus;
+ u32 bistclk_vpuencreset_clkgenconfig;
+ u32 bistclk_vpuencreset_clkgenstatus;
+ u32 bistclk_vpudecreset_clkgenconfig;
+ u32 bistclk_vpudecreset_clkgenstatus;
+ u32 bistclk_displayreset_clkgenconfig;
+ u32 bistclk_displayreset_clkgenstatus;
+ u32 bistclk_edisplayreset_clkgenconfig;
+ u32 bistclk_edisplayreset_clkgenstatus;
+ u8 _reserved9[0x78];
+ u32 sdmmcbaseclk_clkgenconfig;
+ u32 sdmmcbaseclk_clkgenstatus;
+ u8 _reserved10[0x08];
+ u32 cfgclk_a2_clkgenconfig;
+ u32 cfgclk_a2_clkgenstatus;
+ u8 _reserved11[0x08];
+ u32 uartclk0_clkgenconfig;
+ u32 uartclk0_clkgenstatus;
+ u8 _reserved12[0x08];
+ u32 uartclk1_clkgenconfig;
+ u32 uartclk1_clkgenstatus;
+ u8 _reserved13[0x08];
+ u32 sspclk0_clkgenconfig;
+ u32 sspclk0_clkgenstatus;
+ u8 _reserved14[0x08];
+ u32 sspclk1_clkgenconfig;
+ u32 sspclk1_clkgenstatus;
+ u8 _reserved15[0x08];
+ u32 i2cclk0_clkgenconfig;
+ u32 i2cclk0_clkgenstatus;
+ u8 _reserved16[0x08];
+ u32 i2cclk1_clkgenconfig;
+ u32 i2cclk1_clkgenstatus;
+ u8 _reserved17[0x08];
+ u32 i2cclk2_clkgenconfig;
+ u32 i2cclk2_clkgenstatus;
+ u8 _reserved18[0x08];
+ u32 i2cclk3_clkgenconfig;
+ u32 i2cclk3_clkgenstatus;
+ u8 _reserved19[0x08];
+ u32 i2cclk4_clkgenconfig;
+ u32 i2cclk4_clkgenstatus;
+};
+
+check_member(mvmap2315_apmu_clk_regs, i2cclk4_clkgenstatus, 0x3A4);
+static struct mvmap2315_apmu_clk_regs * const mvmap2315_apmu_clk
+ = (void *)MVMAP2315_APMU_CLK_BASE;
+
+#define MVMAP2315_AP_RST_EN BIT(0)
+#define MVMAP2315_MCU_RST_EN BIT(0)
+struct mvmap2315_mpmu_clk_regs {
+ u32 resetap;
+ u32 resetmcu;
+ u32 resetstatus;
+ u8 _reserved0[4];
+ u32 apaudiopllselect;
+ u8 _reserved1[0x0c];
+ u32 sspa_asrc_rx_clk0;
+ u32 sspa_asrc_rx_clk1;
+ u32 sspa_asrc_rx_clk2;
+ u32 sspa_asrc_tx_clk0;
+ u32 sspa_asrc_tx_clk1;
+ u32 sspa_asrc_tx_clk2;
+ u32 dmic_asrc_clk;
+ u8 _reserved2[4];
+ u32 uartfracdivcfg0;
+ u8 _reserved3[0x0c];
+ u32 uartfracdivcfg1;
+ u8 _reserved4[0xcc];
+ u32 clk32k_clkgenconfig;
+ u32 clk32k_clkgenstatus;
+ u8 _reserved5[0x08];
+ u32 cpudbgclk_clkgenconfig;
+ u32 cpudbgclk_clkgenstatus;
+ u8 _reserved6[0x08];
+ u32 m4clk_bist_clkgenconfig;
+ u32 m4clk_bist_clkgenstatus;
+ u8 _reserved7[0x08];
+ u32 bspiclk_clkgenconfig;
+ u32 bspiclk_clkgenstatus;
+ u8 _reserved8[0x08];
+ u32 dmicclk_clkgenconfig;
+ u32 dmicclk_clkgenstatus;
+ u8 _reserved9[0x48];
+ u32 sspaclk0_clkgenconfig;
+ u32 sspaclk0_clkgenstatus;
+ u32 sspaclk1_clkgenconfig;
+ u32 sspaclk1_clkgenstatus;
+ u32 sspaclk2_clkgenconfig;
+ u32 sspaclk2_clkgenstatus;
+ u8 _reserved10[0x38];
+ u32 mcuclk_clkgenconfig;
+ u32 mcuclk_clkgenstatus;
+ u8 _reserved11[0x08];
+ u32 mcuclk_cdma_clkgenconfig;
+ u32 mcuclk_cdma_clkgenstatus;
+ u8 _reserved12[0x08];
+ u32 mcuclk_bspi_clkgenconfig;
+ u32 mcuclk_bspi_clkgenstatus;
+ u8 _reserved13[0x08];
+ u32 mcuclk_owi_clkgenconfig;
+ u32 mcuclk_owi_clkgenstatus;
+ u8 _reserved14[0x08];
+ u32 mcuclk_uart0_clkgenconfig;
+ u32 mcuclk_uart0_clkgenstatus;
+ u8 _reserved15[0x08];
+ u32 mcuclk_uart1_clkgenconfig;
+ u32 mcuclk_uart1_clkgenstatus;
+ u8 _reserved16[0x08];
+ u32 mcuclk_ssp0_clkgenconfig;
+ u32 mcuclk_ssp0_clkgenstatus;
+ u8 _reserved17[0x08];
+ u32 mcuclk_ssp1_clkgenconfig;
+ u32 mcuclk_ssp1_clkgenstatus;
+ u8 _reserved18[0x08];
+ u32 mcuclk_sspa0_clkgenconfig;
+ u32 mcuclk_sspa0_clkgenstatus;
+ u8 _reserved19[0x08];
+ u32 mcuclk_sspa1_clkgenconfig;
+ u32 mcuclk_sspa1_clkgenstatus;
+ u8 _reserved20[0x08];
+ u32 mcuclk_sspa2_clkgenconfig;
+ u32 mcuclk_sspa2_clkgenstatus;
+ u8 _reserved21[0x08];
+ u32 mcuclk_dmic0_clkgenconfig;
+ u32 mcuclk_dmic0_clkgenstatus;
+ u8 _reserved22[0x08];
+ u32 mcuclk_dmic1_clkgenconfig;
+ u32 mcuclk_dmic1_clkgenstatus;
+ u8 _reserved23[0x08];
+ u32 mcuclk_dmic2_clkgenconfig;
+ u32 mcuclk_dmic2_clkgenstatus;
+ u8 _reserved24[0x08];
+ u32 mcuclk_dmic3_clkgenconfig;
+ u32 mcuclk_dmic3_clkgenstatus;
+ u8 _reserved25[0x18];
+ u32 dmic_dclk0_clkgenconfig;
+ u32 dmic_dclk0_clkgenstatus;
+ u8 _reserved26[0x08];
+ u32 dmic_dclk1_clkgenconfig;
+ u32 dmic_dclk1_clkgenstatus;
+ u8 _reserved27[0x08];
+ u32 dmic_dclk2_clkgenconfig;
+ u32 dmic_dclk2_clkgenstatus;
+ u8 _reserved28[0x08];
+ u32 dmic_dclk3_clkgenconfig;
+ u32 dmic_dclk3_clkgenstatus;
+ u8 _reserved29[0x08];
+ u32 dmic_engdetclk_clkgenconfig;
+ u32 dmic_engdetclk_clkgenstatus;
+ u8 _reserved30[0x38];
+ u32 refclk_clkgenconfig;
+ u32 refclk_clkgenstatus;
+ u8 _reserved31[0x08];
+ u32 refclk_ssp0_clkgenconfig;
+ u32 refclk_ssp0_clkgenstatus;
+ u8 _reserved32[0x08];
+ u32 refclk_ssp1_clkgenconfig;
+ u32 refclk_ssp1_clkgenstatus;
+ u8 _reserved33[0x08];
+ u32 refclk_uart0_clkgenconfig;
+ u32 refclk_uart0_clkgenstatus;
+ u8 _reserved34[0x08];
+ u32 refclk_uart1_clkgenconfig;
+ u32 refclk_uart1_clkgenstatus;
+ u8 _reserved35[0x08];
+ u32 refclk_i2c0_clkgenconfig;
+ u32 refclk_i2c0_clkgenstatus;
+ u8 _reserved36[0x08];
+ u32 refclk_i2c1_clkgenconfig;
+ u32 refclk_i2c1_clkgenstatus;
+ u8 _reserved37[0x08];
+ u32 refclk_i2c2_clkgenconfig;
+ u32 refclk_i2c2_clkgenstatus;
+ u8 _reserved38[0x08];
+ u32 refclk_i2c3_clkgenconfig;
+ u32 refclk_i2c3_clkgenstatus;
+ u8 _reserved39[0x08];
+ u32 refclk_i2c4_clkgenconfig;
+ u32 refclk_i2c4_clkgenstatus;
+ u8 _reserved40[0x08];
+ u32 refclk_i2c5_clkgenconfig;
+ u32 refclk_i2c5_clkgenstatus;
+ u8 _reserved41[0x08];
+ u32 refclk_sspa0_clkgenconfig;
+ u32 refclk_sspa0_clkgenstatus;
+ u8 _reserved42[0x08];
+ u32 refclk_sspa1_clkgenconfig;
+ u32 refclk_sspa1_clkgenstatus;
+ u8 _reserved43[0x08];
+ u32 refclk_sspa2_clkgenconfig;
+ u32 refclk_sspa2_clkgenstatus;
+ u8 _reserved44[0x08];
+ u32 tsenclk_clkgenconfig;
+ u32 tsenclk_clkgenstatus;
+ u8 _reserved45[0x08];
+ u32 ap_tsenclk_clkgenconfig;
+ u32 ap_tsenclk_clkgenstatus;
+ u8 _reserved46[0x08];
+ u32 sspa_mclk_clkgenconfig;
+ u32 sspa_mclk_clkgenstatus;
+};
+
+check_member(mvmap2315_mpmu_clk_regs, sspa_mclk_clkgenstatus, 0x484);
+static struct mvmap2315_mpmu_clk_regs * const mvmap2315_mpmu_clk
+ = (void *)MVMAP2315_MPMU_CLK_BASE;
+
+void clock_init(void);
+
+#endif /* __SOC_MARVELL_MVMAP2315_CLOCK_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/memlayout.ld b/src/soc/marvell/mvmap2315/include/soc/memlayout.ld
new file mode 100644
index 0000000..e0f497a
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/memlayout.ld
@@ -0,0 +1,55 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <memlayout.h>
+#include <arch/header.ld>
+
+SECTIONS
+{
+ DRAM_START(0x00000000)
+
+#if ENV_RAMSTAGE
+ STACK(0x00080010, 8K)
+#endif
+ POSTRAM_CBFS_CACHE(0x1C0000, 256K)
+ RAMSTAGE(0x00200000, 640K)
+ TTB(0x00300000, 1024K)
+
+ SRAM_START(0xE0000000)
+
+ REGION(BDB, 0xE0000000, 8K, 1)
+ REGION(BootROM_CB, 0xE0002000, 24K, 1)
+
+#if ENV_BOOTBLOCK
+ STACK(0xE0008000, 2K)
+#endif
+
+#if ENV_ROMSTAGE
+ STACK(0xE0008800, 2K)
+#endif
+
+#if ENV_ROMSTAGE || ENV_BOOTBLOCK
+
+ TIMESTAMP(0xE0009000, 1K)
+#endif
+
+ PRERAM_CBFS_CACHE(0xE0009400, 256)
+ PRERAM_CBMEM_CONSOLE(0xE0009500, 8K)
+ REGION(fiq_stack, 0xE000B500, 2560, 1)
+ BOOTBLOCK(0xE000C000, 16K)
+ ROMSTAGE(0xE0010000, 64K)
+ REGION(apmu, 0xE0020000, 64K, 1)
+ SRAM_END(0xE0030000)
+}
diff --git a/src/soc/marvell/mvmap2315/include/soc/mmu_operations.h b/src/soc/marvell/mvmap2315/include/soc/mmu_operations.h
new file mode 100644
index 0000000..d846e72
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/mmu_operations.h
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MARVELL_MVMAP2315_MMU_OPERATIONS_H__
+#define __SOC_MARVELL_MVMAP2315_MMU_OPERATIONS_H__
+
+#define MVMAP2315_FLASH_SIZE 0x02000000
+#define MVMAP2315_RAM_SIZE 0x80000000
+#define MVMAP2315_DEVICE_SIZE 0x7E000000
+
+void mvmap2315_mmu_init(void);
+
+#endif /*__SOC_MARVELL_MVMAP2315_MMU_OPERATIONS_H__*/
diff --git a/src/soc/marvell/mvmap2315/include/soc/pinmux.h b/src/soc/marvell/mvmap2315/include/soc/pinmux.h
new file mode 100644
index 0000000..8b921ca
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/pinmux.h
@@ -0,0 +1,85 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MARVELL_MVMAP2315_PINMUX_H__
+#define __SOC_MARVELL_MVMAP2315_PINMUX_H__
+
+#include <types.h>
+
+#include <soc/addressmap.h>
+
+#define PINMUX(a, b, c, d, e, f) ((struct mvmap2315_pinmux) { \
+ .pad = a, \
+ .fun_sel = b, \
+ .raw_sel = c, \
+ .dgtb_sel = d, \
+ .slew = e, \
+ .pull_sel = f})
+
+#define MVMAP2315_PADWRAP_FUNC_SEL (BIT(0) | BIT(1) | BIT(2))
+#define MVMAP2315_PADWRAP_RAW_SEL BIT(3)
+#define MVMAP2315_PADWRAP_DGTB_SEL (BIT(4) | BIT(5) | BIT(6) | BIT(7))
+#define MVMAP2315_PADWRAP_SLEW (BIT(11) | BIT(12))
+#define MVMAP2315_PADWRAP_PD_EN BIT(13)
+#define MVMAP2315_PADWRAP_PU_EN BIT(14)
+
+#define MVMAP2315_PADWRAP_FUNC_SEL_SHIFT 0
+#define MVMAP2315_PADWRAP_RAW_SEL_SHIFT 3
+#define MVMAP2315_PADWRAP_DGTB_SEL_SHIFT 4
+#define MVMAP2315_PADWRAP_SLEW_SHIFT 11
+struct mvmap2315_pinmux_regs {
+ u32 io_pad_piocfg[72];
+ u8 _reserved0[0xee0];
+ u32 pc_pwrdwn_g29_pwrdn;
+ u32 pc_v18en_lvl_g29;
+ u32 vdd3p3_1p8_g29_reg_pwrdn;
+ u32 pc_pwrdwn_g30_pwrdn;
+ u32 pc_v18en_lvl_g30;
+ u32 vdd3p3_1p8_g30_reg_pwrdn;
+ u32 pc_pwrdwn_g31_pwrdn;
+ u32 pc_v18en_lvl_g31;
+ u32 vdd3p3_1p8_g31_reg_pwrdn;
+ u32 pc_pwrdwn_g32_pwrdn;
+ u32 pc_v18en_lvl_g32;
+ u32 vdd3p3_1p8_g32_reg_pwrdn;
+ u32 pc_pwrdwn_g33_pwrdn;
+ u32 pc_v18en_lvl_g33;
+ u32 vdd3p3_1p8_g33_reg_pwrdn;
+};
+
+check_member(mvmap2315_pinmux_regs, vdd3p3_1p8_g33_reg_pwrdn, 0x1038);
+static struct mvmap2315_pinmux_regs * const mvmap2315_pinmux
+ = (void *)MVMAP2315_PINMUX_BASE;
+
+struct mvmap2315_pinmux {
+ u32 pad;
+ u32 fun_sel;
+ u32 raw_sel;
+ u32 dgtb_sel;
+ u32 slew;
+ u32 pull_sel;
+};
+
+check_member(mvmap2315_pinmux, pull_sel, 0x14);
+
+enum {
+ PULLNONE = 0,
+ PULLDOWN = 1,
+ PULLUP = 2
+};
+
+void set_pinmux(struct mvmap2315_pinmux pinmux);
+
+#endif /* __SOC_MARVELL_MVMAP2315_PINMUX_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/reset.h b/src/soc/marvell/mvmap2315/include/soc/reset.h
new file mode 100644
index 0000000..2f4a9a3
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/reset.h
@@ -0,0 +1,20 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __SOC_MARVELL_MVMAP2315_RESET_H__
+#define __SOC_MARVELL_MVMAP2315_RESET_H__
+
+void mvmap2315_reset(void);
+
+#endif /* __SOC_MARVELL_MVMAP2315_RESET_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/sdram.h b/src/soc/marvell/mvmap2315/include/soc/sdram.h
new file mode 100644
index 0000000..00b8a62
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/sdram.h
@@ -0,0 +1,20 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __SOC_MARVELL_MVMAP2315_SDRAM_H__
+#define __SOC_MARVELL_MVMAP2315_SDRAM_H__
+
+size_t sdram_size_mb(void);
+
+#endif /* __SOC_MARVELL_MVMAP2315_SDRAM_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/timer.h b/src/soc/marvell/mvmap2315/include/soc/timer.h
new file mode 100644
index 0000000..573903a
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/timer.h
@@ -0,0 +1,47 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MARVELL_MVMAP2315_TIMER_H__
+#define __SOC_MARVELL_MVMAP2315_TIMER_H__
+
+#include <soc/addressmap.h>
+#include <types.h>
+
+#define MVMAP2315_CLOCKS_PER_USEC 13
+
+#define MVMAP2315_TIMER_T1CR_TE BIT(0)
+#define MVMAP2315_TIMER_T1CR_TM BIT(1)
+#define MVMAP2315_TIMER_T1CR_TIM BIT(2)
+#define MVMAP2315_TIMER_T1CR_TPWM BIT(3)
+
+struct mvmap2315_timer_regs {
+ u32 t1lc;
+ u32 t1cv;
+ u32 t1cr;
+ u32 t1eoi;
+ u32 t1is;
+ u8 _reserved0[0x8c];
+ u32 tis;
+ u32 teoi;
+ u32 tris;
+ u32 tcv;
+ u32 t1lc2;
+};
+
+check_member(mvmap2315_timer_regs, t1lc2, 0xB0);
+static struct mvmap2315_timer_regs * const mvmap2315_timer0
+ = (void *)MVMAP2315_TIMER0_BASE;
+
+#endif /* __SOC_MARVELL_MVMAP2315_TIMER_H__ */
diff --git a/src/soc/marvell/mvmap2315/include/soc/uart.h b/src/soc/marvell/mvmap2315/include/soc/uart.h
new file mode 100644
index 0000000..3a030ba
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/include/soc/uart.h
@@ -0,0 +1,21 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __SOC_MARVELL_MVMAP2315_UART_H__
+#define __SOC_MARVELL_MVMAP2315_UART_H__
+
+extern u32 uart_num;
+
+#endif /* __SOC_MARVELL_MVMAP2315_UART_H__ */
diff --git a/src/soc/marvell/mvmap2315/media.c b/src/soc/marvell/mvmap2315/media.c
new file mode 100644
index 0000000..9b78261
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/media.c
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <boot_device.h>
+#include <soc/addressmap.h>
+#include <symbols.h>
+
+static struct mem_region_device mdev =
+ MEM_REGION_DEV_RO_INIT((void *)MVMAP2315_CBFS_BASE, CONFIG_ROM_SIZE);
+
+const struct region_device *boot_device_ro(void)
+{
+ return &mdev.rdev;
+}
diff --git a/src/soc/marvell/mvmap2315/mmu_operations.c b/src/soc/marvell/mvmap2315/mmu_operations.c
new file mode 100644
index 0000000..fe28116
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/mmu_operations.c
@@ -0,0 +1,48 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <memrange.h>
+#include <arch/mmu.h>
+#include <soc/addressmap.h>
+#include <soc/mmu_operations.h>
+
+static void mvmap2315_mmu_config(void)
+{
+ const unsigned long ram_mem = MA_MEM | MA_NS | MA_RW;
+ const unsigned long dev_mem = MA_DEV | MA_S | MA_RW;
+ const unsigned long flash_mem = MA_MEM | MA_S | MA_RW;
+
+ mmu_config_range((void *)MVMAP2315_RAM_BASE,
+ MVMAP2315_RAM_SIZE, ram_mem);
+
+ mmu_config_range((void *)MVMAP2315_DEVICE_BASE,
+ MVMAP2315_DEVICE_SIZE, dev_mem);
+
+ mmu_config_range((void *)MVMAP2315_FLASH_BASE,
+ MVMAP2315_FLASH_SIZE, flash_mem);
+}
+
+void mvmap2315_mmu_init(void)
+{
+ mmu_init();
+
+ mvmap2315_mmu_config();
+
+ mmu_enable();
+}
diff --git a/src/soc/marvell/mvmap2315/pinmux.c b/src/soc/marvell/mvmap2315/pinmux.c
new file mode 100644
index 0000000..159d62e
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/pinmux.c
@@ -0,0 +1,64 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <arch/io.h>
+#include <soc/pinmux.h>
+
+void set_pinmux(struct mvmap2315_pinmux pinmux)
+{
+ u32 pad_num;
+ u32 reg = 0;
+
+ /* pads < 160 are part of the MCU domain and not handled here
+ * and pads > 231 don't exist
+ */
+ if (pinmux.pad < 160 || pinmux.pad > 231)
+ return;
+
+ pad_num = pinmux.pad - 160;
+
+ reg |= (pinmux.fun_sel <<
+ MVMAP2315_PADWRAP_FUNC_SEL_SHIFT) &
+ MVMAP2315_PADWRAP_FUNC_SEL;
+
+ reg |= (pinmux.raw_sel <<
+ MVMAP2315_PADWRAP_RAW_SEL_SHIFT) &
+ MVMAP2315_PADWRAP_RAW_SEL;
+
+ reg |= (pinmux.dgtb_sel <<
+ MVMAP2315_PADWRAP_DGTB_SEL_SHIFT) &
+ MVMAP2315_PADWRAP_DGTB_SEL;
+
+ reg |= (pinmux.slew <<
+ MVMAP2315_PADWRAP_SLEW_SHIFT) &
+ MVMAP2315_PADWRAP_SLEW;
+
+ if (!pinmux.pull_sel) {
+ reg &= ~MVMAP2315_PADWRAP_PD_EN;
+ reg &= ~MVMAP2315_PADWRAP_PU_EN;
+ } else if (pinmux.pull_sel == 1) {
+ reg |= MVMAP2315_PADWRAP_PD_EN;
+ reg &= ~MVMAP2315_PADWRAP_PU_EN;
+ } else if (pinmux.pull_sel == 2) {
+ reg &= ~MVMAP2315_PADWRAP_PD_EN;
+ reg |= MVMAP2315_PADWRAP_PU_EN;
+ }
+
+ write32(&mvmap2315_pinmux->io_pad_piocfg[pad_num], reg);
+}
diff --git a/src/soc/marvell/mvmap2315/reset.c b/src/soc/marvell/mvmap2315/reset.c
new file mode 100644
index 0000000..531f4a0
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/reset.c
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <arch/io.h>
+#include <soc/clock.h>
+#include <soc/reset.h>
+
+void mvmap2315_reset(void)
+{
+ clrbits_le32(&mvmap2315_mpmu_clk->resetmcu, MVMAP2315_MCU_RST_EN);
+ clrbits_le32(&mvmap2315_mpmu_clk->resetap, MVMAP2315_AP_RST_EN);
+}
diff --git a/src/soc/marvell/mvmap2315/romstage.c b/src/soc/marvell/mvmap2315/romstage.c
new file mode 100644
index 0000000..4ea5eed
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/romstage.c
@@ -0,0 +1,45 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <arch/exception.h>
+#include <cbmem.h>
+#include <console/console.h>
+#include <program_loading.h>
+#include <soc/clock.h>
+#include <soc/mmu_operations.h>
+#include <timestamp.h>
+
+void main(void)
+{
+ timestamp_add_now(TS_START_ROMSTAGE);
+
+ console_init();
+
+ exception_init();
+
+ clock_init();
+
+ mvmap2315_mmu_init();
+
+ cbmem_initialize_empty();
+
+ timestamp_add_now(TS_END_ROMSTAGE);
+
+ run_ramstage();
+}
diff --git a/src/soc/marvell/mvmap2315/romstage_entry.S b/src/soc/marvell/mvmap2315/romstage_entry.S
new file mode 100644
index 0000000..a41ed29
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/romstage_entry.S
@@ -0,0 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/asm.h>
+
+ENTRY(_start)
+ /* Initialize PSTATE, SCTLR and caches to clean state, set up stack. */
+ bl arm64_init_cpu
+
+ bl main
+ENDPROC(_start)
diff --git a/src/soc/marvell/mvmap2315/sdram.c b/src/soc/marvell/mvmap2315/sdram.c
new file mode 100644
index 0000000..2d17137
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/sdram.c
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <soc/sdram.h>
+
+size_t sdram_size_mb(void)
+{
+ return CONFIG_DRAM_SIZE_MB;
+}
diff --git a/src/soc/marvell/mvmap2315/soc.c b/src/soc/marvell/mvmap2315/soc.c
new file mode 100644
index 0000000..9395dce
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/soc.c
@@ -0,0 +1,42 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <device/device.h>
+#include <soc/addressmap.h>
+#include <symbols.h>
+
+static void soc_read_resources(device_t dev)
+{
+ ram_resource(dev, 0, (uintptr_t)_dram / KiB,
+ min(CONFIG_DRAM_SIZE_MB * KiB, MAX_DRAM_ADDRESS / KiB));
+}
+
+static struct device_operations soc_ops = {
+ .read_resources = soc_read_resources,
+};
+
+static void enable_mvmap2315_dev(device_t dev)
+{
+ dev->ops = &soc_ops;
+}
+
+struct chip_operations soc_marvell_mvmap2315_ops = {
+ CHIP_NAME("SOC Marvell MVMAP2315")
+ .enable_dev = enable_mvmap2315_dev,
+};
diff --git a/src/soc/marvell/mvmap2315/timer.c b/src/soc/marvell/mvmap2315/timer.c
new file mode 100644
index 0000000..7922e05
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/timer.c
@@ -0,0 +1,63 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <arch/io.h>
+#include <delay.h>
+#include <soc/timer.h>
+#include <timer.h>
+
+void init_timer(void)
+{
+ /* disable timer */
+ clrbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TE);
+
+ /* set to free-running mode (loads max value at timer expiration) */
+ clrbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TM);
+
+ /* mask interrupt (not currently used) */
+ setbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TIM);
+
+ /* disable PWM output */
+ clrbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TPWM);
+
+ /* perform dummy read to clear all active interrupts */
+ read32(&mvmap2315_timer0->t1eoi);
+
+ /* must provide an initial load count even in free-running mode */
+ write32(&mvmap2315_timer0->t1lc, 0xFFFFFFFF);
+
+ /* enable timer */
+ setbits_le32(&mvmap2315_timer0->t1cr, MVMAP2315_TIMER_T1CR_TE);
+
+ /* busy wait until timer count is non-zero */
+ while (!read32(&mvmap2315_timer0->t1cv))
+ ;
+}
+
+static u32 timer_raw_value(void)
+{
+ /* invert count to change from down to up count */
+ return ~read32(&mvmap2315_timer0->t1cv);
+}
+
+void timer_monotonic_get(struct mono_time *mt)
+{
+ mt->microseconds = (long)(timer_raw_value() /
+ MVMAP2315_CLOCKS_PER_USEC);
+}
diff --git a/src/soc/marvell/mvmap2315/uart.c b/src/soc/marvell/mvmap2315/uart.c
new file mode 100644
index 0000000..51c74fc
--- /dev/null
+++ b/src/soc/marvell/mvmap2315/uart.c
@@ -0,0 +1,49 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Marvell, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+#include <stdlib.h>
+
+#include <assert.h>
+#include <console/uart.h>
+#include <rules.h>
+#include <stdint.h>
+#include <soc/uart.h>
+
+#if ENV_BOOTBLOCK
+u32 uart_num;
+#endif
+
+unsigned int uart_platform_refclk(void)
+{
+ return 160690;
+}
+
+uintptr_t uart_platform_base(int idx)
+{
+ /* Default to UART 0 */
+ u32 base = CONFIG_CONSOLE_SERIAL_MVMAP2315_UART_ADDRESS;
+
+#if ENV_BOOTBLOCK
+ assert((uart_num >= 0) && (uart_num <= 1));
+ base += uart_num * 0x1000;
+#else
+ assert((idx >= 0) && (idx <= 1));
+ base += idx * 0x1000;
+#endif
+
+ return base;
+}
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