[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/quark: Add FSP 2.0 romstage support
gerrit at coreboot.org
gerrit at coreboot.org
Fri Aug 5 01:53:58 CEST 2016
the following patch was just integrated into master:
commit f26fc0f28bf62dd34533aea47105f174ee794e66
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Mon Jul 25 10:14:07 2016 -0700
soc/intel/quark: Add FSP 2.0 romstage support
Add the pieces necessary to successfully build and run romstage using
the FSP 2.0 build. Because romstage is using postcar, add the postcar
pieces so that romstage can attempt to load postcar.
TEST=Build and run on Galileo Gen2
Change-Id: I66b3437e3c7840223535f6ab643599c9e4924968
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
Reviewed-on: https://review.coreboot.org/15866
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth at google.com>
See https://review.coreboot.org/15866 for details.
-gerrit
More information about the coreboot-gerrit
mailing list