[coreboot-gerrit] Patch set updated for coreboot: soc/intel/quark: Disable FSP serial output

[Lee Leahy (leroy.p.leahy@intel.com)]

Lee Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16005

-gerrit

commit ef466915f65d46a9a0cc1188be3c6032cf01776b
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Sun Jul 31 13:40:15 2016 -0700

    soc/intel/quark: Disable FSP serial output
    
    Disable FSP output when CONFIG_DEFAULT_CONSOLE_LOGLEVEL is not set to 8
    (BIOS_SPEW).  Use the console log level to choose between the serial
    port address and NULL and pass it to FSP for the serial port address.
    
    TEST=Build and run on Galileo Gen2.
    
    Change-Id: I5498aad218524c211082d85d0ae9aacaf08a80f6
    Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
 src/soc/intel/quark/romstage/fsp1_1.c | 3 ++-
 src/soc/intel/quark/romstage/fsp2_0.c | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/soc/intel/quark/romstage/fsp1_1.c b/src/soc/intel/quark/romstage/fsp1_1.c
index 16d1d06..5ba2174 100644
--- a/src/soc/intel/quark/romstage/fsp1_1.c
+++ b/src/soc/intel/quark/romstage/fsp1_1.c
@@ -120,7 +120,8 @@ void soc_memory_init_params(struct romstage_params *params,
 	upd->RankMask = config->RankMask;
 	upd->RmuBaseAddress = (uintptr_t)rmu_file;
 	upd->RmuLength = rmu_file_len;
-	upd->SerialPortBaseAddress = UART_BASE_ADDRESS;
+	upd->SerialPortBaseAddress = console_log_level(BIOS_SPEW)
+		? UART_BASE_ADDRESS : 0;
 	upd->SmmTsegSize = IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) ?
 		config->SmmTsegSize : 0;
 	upd->SocRdOdtVal = config->SocRdOdtVal;
diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c
index af05856..6ca6a4c 100644
--- a/src/soc/intel/quark/romstage/fsp2_0.c
+++ b/src/soc/intel/quark/romstage/fsp2_0.c
@@ -161,7 +161,8 @@ void platform_fsp_memory_init_params_cb(struct FSPM_UPD *fspm_upd)
 	upd->RankMask = config->RankMask;
 	upd->RmuBaseAddress = (uintptr_t)rmu_file;
 	upd->RmuLength = rmu_file_len;
-	upd->SerialPortBaseAddress = UART_BASE_ADDRESS;
+	upd->SerialPortBaseAddress = console_log_level(BIOS_SPEW)
+		? UART_BASE_ADDRESS : 0;
 	upd->SmmTsegSize = IS_ENABLED(CONFIG_HAVE_SMI_HANDLER) ?
 		config->SmmTsegSize : 0;
 	upd->SocRdOdtVal = config->SocRdOdtVal;