[coreboot-gerrit] Patch set updated for coreboot: drivers/intel/fsp2_0: Monitor FSP setting of MTRRs
Lee Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Wed Aug 3 05:46:47 CEST 2016
Lee Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15849
-gerrit
commit 394cd75cf4341b7ce3de4ea030e8b34a5e6ad0b8
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Sun Jul 24 08:26:06 2016 -0700
drivers/intel/fsp2_0: Monitor FSP setting of MTRRs
Display the MTRR values in the following locations:
* Before the call to FspMemoryInit to document coreboot settings
* After the call to FspMemoryInit
* Before the call to FspSiliconInit
* After the call to FspSiliconInit
* After the call to FspNotify
* Before the call to FspNotify added in patch 15855
TEST=Build and run on Galileo Gen2
Change-Id: I8942ef4ca4677501a5c38abaff1c3489eebea53c
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
src/drivers/intel/fsp2_0/debug.c | 23 ++++++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/src/drivers/intel/fsp2_0/debug.c b/src/drivers/intel/fsp2_0/debug.c
index 31fba20..6998295 100644
--- a/src/drivers/intel/fsp2_0/debug.c
+++ b/src/drivers/intel/fsp2_0/debug.c
@@ -11,6 +11,7 @@
#include <console/console.h>
#include <fsp/util.h>
+#include <soc/intel/common/util.h>
/*-----------
* MemoryInit
@@ -20,6 +21,10 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
const struct FSPM_UPD *fspm_old_upd,
const struct FSPM_UPD *fspm_new_upd, void **hob_list_ptr)
{
+ /* Display the MTRRs */
+ if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
+ soc_display_mtrrs();
+
/* Display the call entry point and paramters */
if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
return;
@@ -33,6 +38,10 @@ void fsp_debug_after_memory_init(enum fsp_status status,
{
if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_DEBUG, "FspMemoryInit returned 0x%08x\n", status);
+
+ /* Display the MTRRs */
+ if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
+ soc_display_mtrrs();
}
/*-----------
@@ -43,6 +52,10 @@ void fsp_debug_before_silicon_init(fsp_silicon_init_fn silicon_init,
const struct FSPS_UPD *fsps_old_upd,
const struct FSPS_UPD *fsps_new_upd)
{
+ /* Display the MTRRs */
+ if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
+ soc_display_mtrrs();
+
/* Display the call to FSP SiliconInit */
if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
return;
@@ -54,6 +67,10 @@ void fsp_debug_after_silicon_init(enum fsp_status status)
{
if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_SPEW, "FspSiliconInit returned 0x%08x\n", status);
+
+ /* Display the MTRRs */
+ if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
+ soc_display_mtrrs();
}
/*-----------
@@ -63,7 +80,7 @@ void fsp_debug_after_silicon_init(enum fsp_status status)
void fsp_before_debug_notify(fsp_notify_fn notify,
const struct fsp_notify_params *notify_params)
{
- /* Display the call to FSP SiliconInit */
+ /* Display the call to FspNotify */
if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
return;
printk(BIOS_SPEW, "0x%08x: notify_params->phase\n",
@@ -76,4 +93,8 @@ void fsp_debug_after_notify(enum fsp_status status)
{
if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_SPEW, "FspNotify returned 0x%08x\n", status);
+
+ /* Display the MTRRs */
+ if (IS_ENABLED(CONFIG_DISPLAY_MTRRS))
+ soc_display_mtrrs();
}
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